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Z-MAP: A Zone-Based Flash Translation Layer with Workload Classification for Solid-State Drive

Published: 24 February 2015 Publication History

Abstract

Existing space management and address mapping schemes for flash-based Solid-State-Drive (SSD) operate either at page or block granularity, with inevitable limitations in terms of memory requirement, performance, garbage collection, and scalability. To overcome these limitations, we proposed a novel space management and address mapping scheme for flash referred to as Z-MAP, which manages flash space at granularity of Zone. Each Zone consists of multiple numbers of flash blocks. Leveraging workload classification, Z-MAP explores Page-mapping Zone (Page Zone) to store random data and handle a large number of partial updates, and Block-mapping Zone (Block Zone) to store sequential data and lower the overall mapping table. Zones are dynamically allocated and a mapping scheme for a Zone is determined only when it is allocated. Z-MAP uses a small part of Flash memory or phase change memory as a streaming Buffer Zone to log data sequentially and migrate data into Page Zone or Block Zone based on workload classification. A two-level address mapping is designed to reduce the overall mapping table and address translation latency. Z-MAP classifies data before it is permanently stored into Flash memory so that different workloads can be isolated and garbage collection overhead can be minimized.
Z-MAP has been extensively evaluated by trace-driven simulation and a prototype implementation on OpenSSD. Our benchmark results conclusively demonstrate that Z-MAP can achieve up to 76% performance improvement, 81% mapping table reduction, and 88% garbage collection overhead reduction compared to existing Flash Translation Layer (FTL) schemes.

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  • (2023)How does solid‐state drives cluster perform for distributed file systems: An empirical studyConcurrency and Computation: Practice and Experience10.1002/cpe.770935:21Online publication date: Apr-2023
  • (2022)Improving I/O Performance via Address Remapping in NVMe InterfaceIEEE Access10.1109/ACCESS.2022.322173310(119722-119733)Online publication date: 2022
  • (2019)A Novel Independent Channel Addressing Flash Translation Layer Scheme2019 IEEE 3rd Information Technology, Networking, Electronic and Automation Control Conference (ITNEC)10.1109/ITNEC.2019.8729164(1047-1051)Online publication date: Mar-2019
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Published In

cover image ACM Transactions on Storage
ACM Transactions on Storage  Volume 11, Issue 1
February 2015
100 pages
ISSN:1553-3077
EISSN:1553-3093
DOI:10.1145/2705611
  • Editor:
  • Darrell Long
Issue’s Table of Contents
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 24 February 2015
Accepted: 01 March 2014
Revised: 01 January 2014
Received: 01 May 2013
Published in TOS Volume 11, Issue 1

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Author Tags

  1. Flash memory
  2. flash translation layer
  3. solid-state drive
  4. space management
  5. workload classification

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  • Research-article
  • Research
  • Refereed

Funding Sources

  • Science and Engineering Research Council Grant, Agency for Science, Technology and Research (A-STAR), Singapore

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Cited By

View all
  • (2023)How does solid‐state drives cluster perform for distributed file systems: An empirical studyConcurrency and Computation: Practice and Experience10.1002/cpe.770935:21Online publication date: Apr-2023
  • (2022)Improving I/O Performance via Address Remapping in NVMe InterfaceIEEE Access10.1109/ACCESS.2022.322173310(119722-119733)Online publication date: 2022
  • (2019)A Novel Independent Channel Addressing Flash Translation Layer Scheme2019 IEEE 3rd Information Technology, Networking, Electronic and Automation Control Conference (ITNEC)10.1109/ITNEC.2019.8729164(1047-1051)Online publication date: Mar-2019
  • (2019)Improving Spatial Locality in Virtual Machine for Flash StorageIEEE Access10.1109/ACCESS.2018.28864737(1668-1676)Online publication date: 2019
  • (2018)Hierarchical Request-Size-Aware Flash Translation Layer Based on Page-Level MappingJournal of Circuits, Systems and Computers10.1142/S0218126619501172(1950117)Online publication date: 6-Sep-2018
  • (2018)Efficient Data-Allocation Scheme for Eliminating Garbage Collection During Analysis of Big Graphs Stored in NAND Flash MemoryIEEE Transactions on Computers10.1109/TC.2017.277562467:5(646-657)Online publication date: 1-May-2018
  • (2017)Transactional NVM cache with high performance and crash consistencyProceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis10.1145/3126908.3126940(1-12)Online publication date: 12-Nov-2017
  • (2017)Software Support Inside and Outside Solid-State Devices for High Performance and High EfficiencyProceedings of the IEEE10.1109/JPROC.2017.2679490105:9(1650-1665)Online publication date: Sep-2017

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