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Voltage Overscaling Algorithms for Energy-Efficient Workflow Computations With Timing Errors

Published: 15 June 2015 Publication History

Abstract

We propose a software-based approach using dynamic voltage overscaling to reduce the energy consumption of HPC applications. This technique aggressively lowers the supply voltage below nominal voltage, which introduces timing errors, and we use Algorithm-Based Fault-Tolerance (ABFT) to provide fault tolerance for matrix operations. We introduce a formal model, and we design optimal polynomial-time solutions, to execute a linear chain of tasks. Evaluation results obtained for matrix multiplication demonstrate that our approach indeed leads to significant energy savings, compared to the standard algorithm that always operates at nominal voltage.

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Cited By

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  • (2023)Improving Energy Saving of One-Sided Matrix Decompositions on CPU-GPU Heterogeneous SystemsProceedings of the 28th ACM SIGPLAN Annual Symposium on Principles and Practice of Parallel Programming10.1145/3572848.3577496(274-287)Online publication date: 25-Feb-2023
  • (2018)VOSsim: A Framework for Enabling Fast Voltage Overscaling Simulation for Approximate Computing CircuitsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2018.280320226:6(1204-1208)Online publication date: Jun-2018
  • (2017)Scheduling for Energy Efficiency and Throughput Maximization in a Faulty Cloud Environment2017 IEEE 23rd International Conference on Parallel and Distributed Systems (ICPADS)10.1109/ICPADS.2017.00079(561-569)Online publication date: Dec-2017
  • Show More Cited By

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    cover image ACM Conferences
    FTXS '15: Proceedings of the 5th Workshop on Fault Tolerance for HPC at eXtreme Scale
    June 2015
    78 pages
    ISBN:9781450335690
    DOI:10.1145/2751504
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Publication History

    Published: 15 June 2015

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    Author Tags

    1. abft
    2. energy efficiency
    3. timing errors
    4. voltage overscaling

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    • Research-article

    Funding Sources

    • European Union Seventh Framework Programme

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    HPDC'15
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    FTXS '15 Paper Acceptance Rate 9 of 15 submissions, 60%;
    Overall Acceptance Rate 16 of 25 submissions, 64%

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    Cited By

    View all
    • (2023)Improving Energy Saving of One-Sided Matrix Decompositions on CPU-GPU Heterogeneous SystemsProceedings of the 28th ACM SIGPLAN Annual Symposium on Principles and Practice of Parallel Programming10.1145/3572848.3577496(274-287)Online publication date: 25-Feb-2023
    • (2018)VOSsim: A Framework for Enabling Fast Voltage Overscaling Simulation for Approximate Computing CircuitsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2018.280320226:6(1204-1208)Online publication date: Jun-2018
    • (2017)Scheduling for Energy Efficiency and Throughput Maximization in a Faulty Cloud Environment2017 IEEE 23rd International Conference on Parallel and Distributed Systems (ICPADS)10.1109/ICPADS.2017.00079(561-569)Online publication date: Dec-2017
    • (2016)ApproxMap: On task allocation and scheduling for resilient applications2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC)10.1109/ASPDAC.2016.7428031(318-323)Online publication date: Jan-2016

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