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General AC constraint transformation for analog ICs

Published: 01 May 1998 Publication History

Abstract

The problem of designing complex analog circuits is attacke dusing a hier archic altop-down, constr aint-driven design methodolo gy. In this methodolo gy, constraints are prop agate dautomatically from high-level specific ationsto physic aldesign through a sequence of gradual transformations. Constraint tr ansformation is a critic al step in the methodolo gy, sinc e it determines in lar ge p art the degree to which specific ations are met. In this pap er we describ e how constr ainttransformations can be efficiently carrie d out using hier ar chic al parameter modeling and constr aine d optimization techniques. The process supp orts c omplexhigh-level sp ecific ation handling and accounts for second-order effects, such as inter connect parasitics and mismatches. The suitability of the appr oachis demonstrate d through an 4th order active filter test case.

References

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  • (2014)A Top-Down Constraint-Driven Methodology for Smart System DesignIEEE Circuits and Systems Magazine10.1109/MCAS.2013.229641514:1(37-57)Online publication date: Sep-2015
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cover image ACM Conferences
DAC '98: Proceedings of the 35th annual Design Automation Conference
May 1998
820 pages
ISBN:0897919645
DOI:10.1145/277044
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 01 May 1998

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  1. fanout optimization
  2. gate-sizing
  3. logic synthesis

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DAC98: The 35th ACM/IEEE-CAS/EDAC Design Automation Conference
June 15 - 19, 1998
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Cited By

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  • (2024)Cross-Domain Optimization of Low-Power Mixed-Signal Sensor Systems Under Classification Accuracy ConstraintsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2024.337245043:8(2507-2517)Online publication date: Aug-2024
  • (2023)Post-Silicon Optimization of a Highly Programmable 64-MHz PLL Achieving 2.7-5.7 μW2023 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE56975.2023.10137143(1-6)Online publication date: Apr-2023
  • (2014)A Top-Down Constraint-Driven Methodology for Smart System DesignIEEE Circuits and Systems Magazine10.1109/MCAS.2013.229641514:1(37-57)Online publication date: Sep-2015
  • (2013)Modeling and design of CMOS analog circuits through hierarchical abstractionIntegration, the VLSI Journal10.1016/j.vlsi.2013.02.00146:4(449-462)Online publication date: 1-Sep-2013
  • (2006)Hierarchical constraint transformation based on genetic optimization for analog system synthesisIntegration10.1016/j.vlsi.2005.07.00339:3(267-290)Online publication date: Jun-2006
  • (1999)Behavioral synthesis of analog systems using two-layered design space explorationProceedings of the 36th annual ACM/IEEE Design Automation Conference10.1145/309847.310105(951-957)Online publication date: 1-Jun-1999
  • (1999)Hierarchical constraint transformation using directed interval search for analog system synthesisProceedings of the conference on Design, automation and test in Europe10.1145/307418.307517(70-es)Online publication date: 1-Jan-1999
  • (1999)A methodology for behavioral synthesis of analog systems1999 Southwest Symposium on Mixed-Signal Design (Cat. No.99EX286)10.1109/SSMSD.1999.768611(162-167)Online publication date: 1999
  • (1999)A genetic approach to simultaneous parameter space exploration and constraint transformation in analog synthesisISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349)10.1109/ISCAS.1999.780170(362-365)Online publication date: 1999
  • (1999)Component characterization and constraint transformation based on directed intervals for analog synthesisProceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013)10.1109/ICVD.1999.745219(589-596)Online publication date: 1999
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