Analysis of micro-architecture resources interference on multicore NUMA systems

Modern computer systems employ multiple cores and various layers of memory modules such as local memory and remote memory. Cores and memory modules are connected through diverse micro-architecture resources including LLC (Last Level Cache), IMC (Integrated Memory Controller), Interconnect, and GQ (Global Queue). Since these micro-architecture resources are shared among cores while accessing data, the interference of these resources gives a significant influence on the system performance. To explore this influence, in this paper, we observe how the execution time changes when we execute SPEC CPU2006 and PARSEC benchmarks with different data and threads placement on our experimental system. We also measure the usage behavior of the micro-architecture resources using PMU (Performance Monitoring Unit) and analyze the correlation between the execution time and PMU parameters. Our finding is that the two PMU parameters, called IMC_reads and writes and QHL_requests are good indicators whose differences are well matched with the performance differences. It implies that changing these indicators in a positive way by controlling data and/or thread placement can boost the system performance.