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Performance Constraint-Aware Task Mapping to Optimize Lifetime Reliability of Manycore Systems

Authors:

Vijeta Rathore,

Vivek Chaturvedi,

Thambipillai SrikanthanAuthors Info & Claims

GLSVLSI '16: Proceedings of the 26th edition on Great Lakes Symposium on VLSI

Pages 377 - 380

https://doi.org/10.1145/2902961.2902996

Published: 18 May 2016 Publication History

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Abstract

Negative bias temperature instability (NBTI) has emerged as a critical challenge to lifetime reliability of computing systems. Traditionally, temperature-aware methodologies are used to mitigate the impact of NBTI on aging and degradation of computing systems. However, in the presence of process variation, which is the norm in manycore processors, temperature-aware techniques are inefficient in improving lifetime reliability and can result in poor performance. In this paper, we propose a novel performance constraint-aware task mapping technique to improve lifetime reliability by mitigating NBTI considering on-chip process variation. Our approach consists of two phases, namely design-time and run-time. During design time, we generate Pareto-optimal mappings. Following which, our run-time technique judiciously intervenes to perform workload migration to save the weakest processing core. We compare our approach with performance-greedy and thermal-aware task mapping techniques. The experiment results demonstrate that our approach outperforms other two techniques and improves lifetime reliability of a manycore system as much as 54% without violating the throughput constraint.

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Cited By

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Weber IZanini VMoraes F(2023)FLEA - FIT-Aware Heuristic for Application Allocation in Many-Cores based on Q-Learning2023 XIII Brazilian Symposium on Computing Systems Engineering (SBESC)10.1109/SBESC60926.2023.10324296(1-6)Online publication date: 21-Nov-2023
https://doi.org/10.1109/SBESC60926.2023.10324296
Rathore VChaturvedi VSingh ASrikanthan TShafique M(2021)Longevity Framework: Leveraging Online Integrated Aging-Aware Hierarchical Mapping and VF-Selection for Lifetime Reliability Optimization in Manycore ProcessorsIEEE Transactions on Computers10.1109/TC.2020.300657170:7(1106-1119)Online publication date: 1-Jul-2021
https://doi.org/10.1109/TC.2020.3006571
Rathore VChaturvedi VSingh ASrikanthan TShafique M(2019)LifeGuardProceedings of the 56th Annual Design Automation Conference 201910.1145/3316781.3317849(1-6)Online publication date: 2-Jun-2019
https://dl.acm.org/doi/10.1145/3316781.3317849
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GLSVLSI '16: Proceedings of the 26th edition on Great Lakes Symposium on VLSI

May 2016

462 pages

ISBN:9781450342742

DOI:10.1145/2902961

General Chairs:
Ayse K. Coskun
Boston University, USA
,
Martin Margala
University of Massachusetts, Lowell, USA
,
Program Chairs:
Laleh Behjat
University of Calgary, Canada
,
Jie Han
University of Alberta, Canada

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 18 May 2016

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GLSVLSI '16: Great Lakes Symposium on VLSI 2016

May 18 - 20, 2016

Massachusetts, Boston, USA

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Weber IZanini VMoraes F(2023)FLEA - FIT-Aware Heuristic for Application Allocation in Many-Cores based on Q-Learning2023 XIII Brazilian Symposium on Computing Systems Engineering (SBESC)10.1109/SBESC60926.2023.10324296(1-6)Online publication date: 21-Nov-2023
https://doi.org/10.1109/SBESC60926.2023.10324296
Rathore VChaturvedi VSingh ASrikanthan TShafique M(2021)Longevity Framework: Leveraging Online Integrated Aging-Aware Hierarchical Mapping and VF-Selection for Lifetime Reliability Optimization in Manycore ProcessorsIEEE Transactions on Computers10.1109/TC.2020.300657170:7(1106-1119)Online publication date: 1-Jul-2021
https://doi.org/10.1109/TC.2020.3006571
Rathore VChaturvedi VSingh ASrikanthan TShafique M(2019)LifeGuardProceedings of the 56th Annual Design Automation Conference 201910.1145/3316781.3317849(1-6)Online publication date: 2-Jun-2019
https://dl.acm.org/doi/10.1145/3316781.3317849
Rathore VChaturvedi VSingh ASrikanthan TShafique M(2019)Towards Scalable Lifetime Reliability Management for Dark Silicon Manycore Systems2019 IEEE 25th International Symposium on On-Line Testing and Robust System Design (IOLTS)10.1109/IOLTS.2019.8854454(204-207)Online publication date: Jul-2019
https://doi.org/10.1109/IOLTS.2019.8854454
Khdr HAmrouch HHenkel J(2018)Aging-constrained performance optimization for multi coresProceedings of the 55th Annual Design Automation Conference10.1145/3195970.3195985(1-6)Online publication date: 24-Jun-2018
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Khdr HAmrouch HHenkel J(2018)Aging-Constrained Performance Optimization for Multi Cores2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)10.1109/DAC.2018.8465829(1-6)Online publication date: Jun-2018
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Amrouch HKhdr HHenkel J(2018)Aging Effects: From Physics to CADHarnessing Performance Variability in Embedded and High-performance Many/Multi-core Platforms10.1007/978-3-319-91962-1_3(43-69)Online publication date: 24-Oct-2018
https://doi.org/10.1007/978-3-319-91962-1_3
Wang LWang XLeung HMak T(2017)Runtime task mapping for lifetime budgeting in many-core systems2017 Forum on Specification and Design Languages (FDL)10.1109/FDL.2017.8303900(1-8)Online publication date: Sep-2017
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Das AKumar AVeeravalli BCatthoor FDas AKumar AVeeravalli BCatthoor F(2017)Literature Survey on System-Level Optimizations TechniquesReliable and Energy Efficient Streaming Multiprocessor Systems10.1007/978-3-319-69374-3_3(33-44)Online publication date: 4-Nov-2017
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On Modeling the Lifetime Reliability of Homogeneous Manycore Systems

Towards reliability-aware circuit design in nanoscale finFET technology: new-generation aging model and circuit reliability simulator

Temperature-Aware NBTI Modeling and the Impact of Standby Leakage Reduction Techniques on Circuit Performance Degradation

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On Modeling the Lifetime Reliability of Homogeneous Manycore Systems

Towards reliability-aware circuit design in nanoscale finFET technology: new-generation aging model and circuit reliability simulator

Temperature-Aware NBTI Modeling and the Impact of Standby Leakage Reduction Techniques on Circuit Performance Degradation

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