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Implementing Dense Optical Flow Computation on a Heterogeneous FPGA SoC in C

Published: 17 August 2016 Publication History
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  • Abstract

    High-quality optical flow computation algorithms are computationally intensive. The low computational speed of such algorithms causes difficulties for real-world applications. In this article, we propose an optimized implementation of the classical Combine-Brightness-Gradient (CBG) model on the Xilinx ZYNQ FPGA-SoC, by taking advantage of the inherent algorithmic parallelism and ZYNQ architecture. The execution time decreases to 0.82 second with a lower power consumption (1.881W). It is better than software implementation on PC (Intel i7-3520M, 2.9GHz), which costs 2.635 seconds and 35W. We use C rather than HDLs to describe the algorithm for rapid prototyping.

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    Published In

    cover image ACM Transactions on Architecture and Code Optimization
    ACM Transactions on Architecture and Code Optimization  Volume 13, Issue 3
    September 2016
    207 pages
    ISSN:1544-3566
    EISSN:1544-3973
    DOI:10.1145/2988523
    Issue’s Table of Contents
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Association for Computing Machinery

    New York, NY, United States

    Publication History

    Published: 17 August 2016
    Accepted: 01 May 2016
    Revised: 01 April 2016
    Received: 01 October 2015
    Published in TACO Volume 13, Issue 3

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    Author Tags

    1. FPGA-accelerated heterogeneous SoC
    2. Variational optical flow computation
    3. ZYNQ
    4. high-level synthesis (HLS)

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    • Research-article
    • Research
    • Refereed

    Funding Sources

    • National High Technology Research and Development Program of China (a.k.a 863 program)
    • 111 Project
    • NSF of China
    • the Shanghai Natural Science Foundation

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    • (2022)An acceleration method of optical flow calculation for automotive ADAS2022 IEEE Intl Conf on Parallel & Distributed Processing with Applications, Big Data & Cloud Computing, Sustainable Computing & Communications, Social Computing & Networking (ISPA/BDCloud/SocialCom/SustainCom)10.1109/ISPA-BDCloud-SocialCom-SustainCom57177.2022.00117(878-887)Online publication date: Dec-2022
    • (2022)Ultra-Flow: An Ultra-fast and High-quality Optical Flow Accelerator with Deep Feature Matching on FPGA2022 32nd International Conference on Field-Programmable Logic and Applications (FPL)10.1109/FPL57034.2022.00017(33-39)Online publication date: Aug-2022
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