research-article

Realizing erase-free SLC flash memory with rewritable programming design

Authors:

Ping-Hsien Lin,

Hsiang-Pang Li,

Yuan-Hao ChangAuthors Info & Claims

CODES '16: Proceedings of the Eleventh IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis

Article No.: 7, Pages 1 - 10

https://doi.org/10.1145/2968456.2968462

Published: 01 October 2016 Publication History

Abstract

Over the past years, the adaptation of flash memory has seen a tremendous growth in a wide range of fields, with high-end applications demanding ever higher reliability and performance for storage devices. Even though a single-level-cell (SLC) flash memory can have a higher endurance and a lower access latency to better meet that requirement in comparison with a multi-level-cell (MLC) one, the rapid deterioration of reliability due to advanced shrinking technology means that a flash block can only survive over a smaller and smaller number of erase cycles. This work proposes an erase-free scheme, which comprises the design of rewritable programming and software management, to enable a rewritable usage model that can reuse flash blocks several times without using erase operations in an SLC flash memory based storage system. The evaluation results show that the proposed scheme achieves 6--time rewritable capability such that 83% erase operations can be removed; in the best settings, the write latency can be reduced by 3.67x on average under various workloads.

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Cited By

Long LHuang JGao CLiu DLiu RJiang Y(2023)ADAR: Application-Specific Data Allocation and Reprogramming Optimization for 3-D TLC Flash MemoryIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.321039042:6(1824-1837)Online publication date: Jun-2023
https://doi.org/10.1109/TCAD.2022.3210390
Gao CYe MXue CZhang YShi LShu JYang J(2022)Reprogramming 3D TLC Flash Memory based Solid State DrivesACM Transactions on Storage10.1145/348706418:1(1-33)Online publication date: 29-Jan-2022
https://dl.acm.org/doi/10.1145/3487064
Chen TChi SYang MChien T(2021)Enabling the Duo-phase Data Management to Realize Longevity Bit-alterable Flash MemoryIEEE Transactions on Computers10.1109/TC.2021.3116862(1-1)Online publication date: 2021
https://doi.org/10.1109/TC.2021.3116862
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cover image ACM Other conferences

CODES '16: Proceedings of the Eleventh IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis

October 2016

294 pages

ISBN:9781450344838

DOI:10.1145/2968456

Copyright © 2016 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 October 2016

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ESWEEK'16

ESWEEK'16: TWELFTH EMBEDDED SYSTEM WEEK

October 1 - 7, 2016

Pennsylvania, Pittsburgh

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Overall Acceptance Rate 280 of 864 submissions, 32%

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Cited By

Long LHuang JGao CLiu DLiu RJiang Y(2023)ADAR: Application-Specific Data Allocation and Reprogramming Optimization for 3-D TLC Flash MemoryIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.321039042:6(1824-1837)Online publication date: Jun-2023
https://doi.org/10.1109/TCAD.2022.3210390
Gao CYe MXue CZhang YShi LShu JYang J(2022)Reprogramming 3D TLC Flash Memory based Solid State DrivesACM Transactions on Storage10.1145/348706418:1(1-33)Online publication date: 29-Jan-2022
https://dl.acm.org/doi/10.1145/3487064
Chen TChi SYang MChien T(2021)Enabling the Duo-phase Data Management to Realize Longevity Bit-alterable Flash MemoryIEEE Transactions on Computers10.1109/TC.2021.3116862(1-1)Online publication date: 2021
https://doi.org/10.1109/TC.2021.3116862
Wang WHo CChang YChang Y(2020)Challenges and Designs for Secure Deletion in Storage Systems2020 Indo – Taiwan 2nd International Conference on Computing, Analytics and Networks (Indo-Taiwan ICAN)10.1109/Indo-TaiwanICAN48429.2020.9181335(181-189)Online publication date: Feb-2020
https://doi.org/10.1109/Indo-TaiwanICAN48429.2020.9181335
Wang WLin PLi YHo CChang YChang Y(2019)Toward Instantaneous Sanitization through Disturbance-induced Errors and Recycling Programming over 3D Flash Memory2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)10.1109/ICCAD45719.2019.8942084(1-8)Online publication date: Nov-2019
https://doi.org/10.1109/ICCAD45719.2019.8942084
Ho CLi YLin PWang WChang Y(2018)A Stride-Away Programming Scheme to Resolve Crash Recoverability and Data Readability Issues of Multi-Level-Cell Flash Memory2018 IEEE 7th Non-Volatile Memory Systems and Applications Symposium (NVMSA)10.1109/NVMSA.2018.00019(67-72)Online publication date: Aug-2018
https://doi.org/10.1109/NVMSA.2018.00019
Chen TChang YKuan YChang Y(2017)VirtualGCProceedings of the 54th Annual Design Automation Conference 201710.1145/3061639.3062339(1-6)Online publication date: 18-Jun-2017
https://dl.acm.org/doi/10.1145/3061639.3062339

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