Cited By
View all- Krupnova HSaucier G(1999)Hierarchical Interactive Approach to Partition Large Designs into FPGAsField Programmable Logic and Applications10.1007/978-3-540-48302-1_11(101-110)Online publication date: 1999
Iterative improvement based multi-way netlist partitioning for FPGAs
Pages 117 - es
References
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Index Terms
- Iterative improvement based multi-way netlist partitioning for FPGAs
Recommendations
Cluster-aware iterative improvement techniques for partitioning large VLSI circuits
Move-based iterative improvement partitioning (IIP) methods, such as the Fiduccia-Mattheyses (FM) algorithm [Fidducia and Mattheyses 1982] and Krishnamurthy's Look-Ahead (LA) algorithm [Krishnamurthy 1984], are widely used in VLSI CAD applications, ...
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January 1999
730 pages
ISBN:1581131216
DOI:10.1145/307418
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View all- Krupnova HSaucier G(1999)Hierarchical Interactive Approach to Partition Large Designs into FPGAsField Programmable Logic and Applications10.1007/978-3-540-48302-1_11(101-110)Online publication date: 1999
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