GCMix: An Efficient Data Protection Scheme against the Paired Page Interference
Article No.: 37, Pages 1 - 23
Abstract
In multi-level cell (MLC) NAND flash memory, two logical pages are overlapped on a single physical page. Even after a logical page is programmed, the data can be corrupted if the programming of the coexisting logical page is interrupted. This phenomenon is called paired page interference.
This article proposes a novel software technique to deal with the paired page interference without any additional hardware or extra page write. The proposed technique utilizes valid pages in the victim block during garbage collection (GC) as the backup against the interference, and pairs them with incoming pages written by the host. This approach eliminates undesirable page copy to backup pages against the interference. However, such a strategy has an adverse effect on the hot/cold separation policy, which is essential to improve the efficiency of GC. To limit the downside, we devise a metric to estimate the benefit of GCMix on-the-fly so that GCMix can be adaptively utilized only when the benefit outweighs the overhead. Evaluations using synthetic and real workloads show GCMix can effectively deal with the paired page interference, reducing the write amplification factor by up to 17.5%compared to the traditional technique, while providing comparable I/O performance.
References
[1]
Amir Ban. 1995. Flash file system. US Patent No. 540485. Filed May 8, 1993; Issued April 4, 1995.
[2]
Feng Chen, David A. Koufaty, and Xiaodong Zhang. 2009. Understanding intrinsic characteristics and system implications of flash memory based solid state drives. In Proceedings of the 2009 ACM SIGMETRICS/Performance. Seattle, WA, 181--192.
[3]
Mei-Ling Chiang, Paul C. H. Lee, and Ruei-Chuan Chang. 1999. Using data clustering to improve cleaning performance for flash memory. Software-Practice and Experience 29, 3 (1999), 267--290.
[4]
Cagdas Dirik and Bruce Jacob. 2009. The performance of PC solid-state disks (SSDs) as a function of bandwidth, concurrenty, device architecture, and system organization. In Proceedings of the 36th Annual International Symposium on Computer Architecture (ISCA’09).
[5]
Laura M. Grupp, John D. Davis, and Steven Swanson. 2013. The harey tortoise: Managing heterogeneous write performance in SSDs. In Proceedings of the 2013 USENIX Annual Technical Conference (USENIX ATC’13). 79--90.
[6]
Aayush Gupta, Youngjae Kim, and Bhuvan Urgaonkar. 2009. DFTL: A flash translation layer employing demand-based selective caching of page-level address mappings. In Proceedings of the International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS’09).
[7]
Jen-Wei Hsieh, Tei-Wei Kuo, and Li-Pin Chang. 2006. Efficient identification of hot data for flash memory storage systems. ACM Transactions on Storage 2, 1 (Feb. 2006), 22--40.
[8]
Min Huang, Zhaoqing Liu, and Liyan Qiao. 2014. Asymmetric programming: A highly reliable metadata allocation strategy for MLC NAND flash memory-based sensor systems. 14, 10 (Oct. 2014), 18851--18877.
[9]
Soojun Im and Dongkun Shin. 2010. ComboFTL: Improving performance and lifespan of MLC flash memory using SLC flash buffer. Journal of Systems Architecture 56, 12 (2010), 641--653.
[10]
Swaroop Kavalanekar, Bruce Worthington, Qi Zhang, and Vishal Sharda. 2008. Characterization of storage workload traces from production windows servers. In Proceedings of the 2008 IEEE International Symposium on Workload Characterization (IISWC’08).
[11]
Atsuo Kawaguchi, Shingo Nishioka, and Hiroshi Motoda. 1995. A flash-memory based file system. In Proceedings of the Winter 1995 USENIX Technical Conference (TCON’95).
[12]
Hyojun Kim, Ki Yong Lee, JaeGyu Jung, and Kyoungil Bahng. 2008. A new transactional flash translation layer for embedded database systems based on MLC NAND flash memory. In Proceedings of the 2008 International Conference on Consumer Electronics (ICCE’08).
[13]
Jesung Kim, Jong Min Kim, Sam H. Noh, Sang Lyul Min, and Yookun Cho. 2002. A space-efficient flash translation layer for compactflash systems. IEEE Transactions on Consumer Electronics 48, 2 (2002), 366--375.
[14]
Ryusuke Konishi, Yoshiji Amagai, Koji Sato, Hisashi Hifumi, Seiji Kihara, and Satoshi Moriai. 2006. The Linux implementation of a log-structured file system. 40, 3 (July 2006), 102--107.
[15]
Min Cheol Kwon, Woon Hyug Jee, Dong Jun Shin, and Shine Kim. 2011. Nonvolatile memory system and related method of preserving stored data during power interruption. US Patent No. 20110093650. Filed June 23, 2010; Issued April 21, 2011.
[16]
Jongsung Lee and Jin-Soo Kim. 2013. An empirical study of hot/cold data separation policies in solid state drives (SSDs). In Proceedings of the 6th International Systems and Storage Conference (SYSTOR’13).
[17]
Jaeil Lee and Dongkun Shin. 2014. Adaptive paired page prebackup scheme for MLC NAND flash memory. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 33, 7 (2014), 1110--1114.
[18]
Sungjin Lee, Dongkun Shin, Young-Jin Kim, and Jihong Kim. 2008. LAST: Locality-aware sector translation for NAND flash memory-based storage systems. ACM SIGOPS Operating Systems Review 42, 6 (2008), 36--42.
[19]
Sang-Won Lee, Won-Kyoung Choi, and Dong-Joo Park. 2006. FAST: An efficient flash translation layer for flash memory. In Proceedings of the 2006 International Conference on Emerging Directions in Embedded and Ubiquitous Computing (EUC’06). 879--887.
[20]
Sang-Won Lee, Bongki Moon, and Chanik Park. 2009. Advances in flash memory SSD technology for enterprise database applications. In Proceedings of the 2009 ACM SIGMOD International Conference on Management of Data (SIGMOD’09).
[21]
Sang-Won Lee, Bongki Moon, Chanik Park, Jae-Myung Kim, and Sang-Woo Kim. 2008. A case for flash memory SSD in enterprise database applications. In Proceedings of the 2008 ACM SIGMOD International Conference on Management of Data (SIGMOD’08). 1075--1086.
[22]
Sang-Won Lee, Dong-Joo Park, Tae-Sun Chung, Dong-Ho Lee, Sangwon Park, and Ha-Joo Song. 2007. A log buffer-based flash translation layer using fully-associative sector translation. ACM Transactions on Embedded Computing Systems 6, 3 (2007), 18.
[23]
Changwoo Min, Kangnyeon Kim, Hyunjin Cho, Sang-Won Lee, and Young Ik Eom. 2012. SFS: Random write considered harmful in solid state drives. In Proceedings of the 10th USENIX Conference on File and Storage Technologies (USENIX FAST’12).
[24]
Mark Moshayedi and Patrick Wilkison. 2008. Enterprise SSDs. ACM Queue (August 2008), 32--39.
[25]
Dushyanth Narayanan, Eno Thereska, Austin Donnelly, Sameh Elnikety, and Antony Rowstron. 2008. Migrating Enterprise Storage to SSDs: Analysis of Tradeoffs. Technical Report MSR-TR-2008-169. Microsoft Research Ltd.
[26]
Dongchul Park and David H. C. Du. 2011. Hot data identification for flash-based storage systems using multiple bloom filters. In Proceedings of the 2011 IEEE 27th Symposium on Mass Storage Systems and Technologies (MSST’11).
[27]
Khyugmin Park. 2008. File system support on multi level cell (MLC) flash in open source. In Proceedings of the 2008 CELF Embedded Linux Conference (ELC’08).
[28]
Vijayan Prabhakaran, Andrea C. Arpaci-Dusseau, and Remzi H. Arpaci-Dusseau. 2005. Analysis and evolution of journaling file systems. In Proceedings of the 2000 USENIX Annual Technical Conference (USENIX ATC’05).
[29]
Frankie F. Roohparvar. 2008. Single level cell programming in a multiple level cell non-volatile memory device. US Patent No. 7366013. Filed December 9, 2005; Issued April 29, 2008.
[30]
Samsung Electronics Co., Ltd. 2006. 2G x 8 Bit NAND Flash Memory, K9GAG08B0M, K9GAG08U0M, K9LBG08U1M. http://n2k1.com/n2k1/NB7/PDF/K9GAG08U0E.pdf.
[31]
Samsung Electronics Co., Ltd. 2010. 32Gb A-die NAND Flash Datasheet, K9GBG08U0A, K9LCG08U1A, K9HDG08U5A. http://dl.btc.pl/kamami_wa/k9gbg08u0a_ds.pdf.
[32]
Marco A. A. Sanvido, Frank R. Chu, Anand Kulkarni, and Robert Selinger. 2008. NAND flash memory and its role in storage architectures. Proc. IEEE 96, 11 (Nov. 2008), 1864--1874.
[33]
SNIA IOTTA Repository. 2011. Microsoft Enterprise Traces - Exchange Server Traces. Retrieved from http://iotta.snia.org/traces/130.
[34]
Anil Vasudeva. 2011. Are SSDs Ready for Enterprise Storage Systems. Retrieved from http://www.snia.org/sites/default/files/AnilVasudeva_Are_SSDs_Ready_Enterprise_Storage_Systemsv4.pdf.
[35]
Wenguang Wang, Yanping Zhao, and Rick Bunt. 2004. HyLog: A high performance approach to managing disk layout. In Proceedings of the 3rd USENIX Conference on File and Storage Technologies (FAST’04). 145--158.
[36]
Han Bin Yoon, Yeong-Jae Woo, and Jung Been Im. Method and apparatus for controlling page buffer of non-volatile memory device. US Patent No. 20110199822. Filed February 16, 2011; Issued August 18, 2011.
[37]
Jae-Sung Yu and Jin-Hyeok Choi. 2010. Programming methods of memory systems having a multilevel cell flash memory. US Patent No. 7755950. Filed April 30, 2007; Issued July 13, 2010.
[38]
George Kingsley Zipf. 1932. Selected Studies of the Principle of Relative Frequency in Language. Harvard University Press.
Index Terms
- GCMix: An Efficient Data Protection Scheme against the Paired Page Interference
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Publication History
Published: 17 November 2017
Accepted: 01 September 2017
Revised: 01 June 2017
Received: 01 March 2016
Published in TOS Volume 13, Issue 4
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- Korea Government (MSIT)
- National Research Foundation of Korean (NRF)
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