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Minimizing write amplification to enhance lifetime of large-page flash-memory storage devices

Published: 24 June 2018 Publication History

Abstract

Due to the decreasing endurance of flash chips, the lifetime of flash drives has become a critical issue. To resolve this issue, various techniques such as wear-leveling and error correction code have been proposed to reduce the bit error rates of flash storage devices. In contrast to these techniques, we observe that minimizing write amplification is another promising direction to enhance the lifetime of a flash storage device. However, the development trend of large-page flash memory exacerbates the write amplification issue. In this work, we present a compression-based management design to deal with compressed data updates and internal fragmentation in flash pages. Thus, it can minimize write amplification by only updating the modified part of flash pages with the support of data reduction techniques; and the reduced write amplification degree is more significant when the flash page size becomes larger due to the development trend. This design is orthogonal to wear-leveling and error correction techniques and thus can cooperate with them to further enhance the lifetime of a flash device. Based on a series of experiments, the results demonstrate that the proposed design can effectively improve the lifetime of a flash storage device by reducing write amplification.

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Cited By

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  • (2023)Alleviating the Impact of Fingerprint Operations on NAND Flash Memory Storage Performance2023 20th International SoC Design Conference (ISOCC)10.1109/ISOCC59558.2023.10395987(249-250)Online publication date: 25-Oct-2023
  • (2022)Rebirth-FTL: Lifetime Optimization via Approximate Storage for NAND Flash MemoryIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2021.312317741:10(3276-3289)Online publication date: 1-Oct-2022

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cover image ACM Conferences
DAC '18: Proceedings of the 55th Annual Design Automation Conference
June 2018
1089 pages
ISBN:9781450357005
DOI:10.1145/3195970
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 24 June 2018

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Author Tags

  1. compression-based FTL
  2. flash lifetime
  3. large flash page

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DAC '18
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DAC '18: The 55th Annual Design Automation Conference 2018
June 24 - 29, 2018
California, San Francisco

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Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Cited By

View all
  • (2023)Alleviating the Impact of Fingerprint Operations on NAND Flash Memory Storage Performance2023 20th International SoC Design Conference (ISOCC)10.1109/ISOCC59558.2023.10395987(249-250)Online publication date: 25-Oct-2023
  • (2022)Rebirth-FTL: Lifetime Optimization via Approximate Storage for NAND Flash MemoryIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2021.312317741:10(3276-3289)Online publication date: 1-Oct-2022

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