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An Optimized Method of Hardware Implementation for LHash in the Embedded System

Published: 22 October 2018 Publication History

Abstract

The security1 of embedded systems has received much attention due to its widespread use and open application environment. Hash function is a commonly used solution to protect embedded system security. Due to the influence of area and power consumption, traditional hash encryption algorithms cannot be directly applied to embedded system because they consume too many resources. Therefore, lightweight encryption algorithms are receiving more and more attention. This paper proposes a method of applying LHash in embedded systems. The experimental results show that the method can correctly implement the LHash algorithm, and can simultaneously consider the area, power consumption and encryption speed, and has good applicability and security.

References

[1]
Tuck Nathan, Calder Brad, and Varghese George. 2004. Hardware and binary modification support for code pointer protection from buffer overflow. Proceedings of the Annual International Symposium on Microarchitecture, MICRO, Portland, OR, United states: Institute of Electrical and Electronics Engineers Computer Society, 209--220.
[2]
Younan Yves, Joosen Wouter, and Piessens Frank. 2004. Code injection in C and C++: A survey of vulnerabilities and countermeasures. Leuven: Departement Computerwetenschappen, Katholieke Universiteit Leuven.
[3]
Andrey Bogdanov, Miroslav Knezevic, Gregor Leander, Deniz Toz, Kerem Varici and Ingrid Verbauwhede. 2013. SPONGENT: The design space of lightweight cryptographic hashing. IEEE Transactions on Computers, 62(10), 2041--2053.
[4]
Bogdanov, A, Leander, G, and Paar, C, Poschmann, A, Robshaw, M, and Seurin, Y. 2008. Hash functions and RFID tags: mind the gap. Proc. 10th Int'l Workshop Cryptographic Hardware and Embedded Systems (CHES'08), 283--299.
[5]
Xu Guo, and Patrick Schaumont. 2011. The technology dependence of lightweight hash implementation cost. Proc. ECRYPT Workshop Lightweight Cryptography.
[6]
Jun Muramatsu, and Shigeki Miyake. 2010. Corrections to "Hash property and fixed-rate universal coding theorems". IEEE Information Theory Society, 56(6), 2688--2698.
[7]
Ignacio Algredo-Badillo, Claudia Feregrino-Uribe, René Cumplido, and Miguel Morales-Sandoval. 2008. Design and implementation of a non-pipelined MD5 Hardware architecture using a new functional description. IEICE-Transactions on Information and Systems, E91-D(10), 2519--2523.
[8]
A. Bogdanov, L.R. Knudsen, G. Leander, C. Paar, and et al. 2007. PRESENT: An ultra lightweight block cipher. Proc. 9th Int'l Workshop Cryptographic Hardware and Embedded Systems (CHES'07), 450--466.
[9]
Wenling Wu, Shuang Wu, Lei Zhang, and et al. 2014. LHash: A Lightweight Hash Function. Information Security and Cryptology, 291--308.
[10]
Xiang Wang, Weike Wang, Bin Xu, and et al. 2018. A Fine-Grained Hardware Security Approach for Runtime Code Integrity in Embedded Systems. Journal of Universal Computer Science, 24(4), 515--536.

Cited By

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  • (2022)Implementation of Code Integrity Check Module for RISC-V Architecture with AES2022 International Conference on Theoretical and Applied Computer Science and Engineering (ICTASCE)10.1109/ICTACSE50438.2022.10009686(148-152)Online publication date: 29-Sep-2022

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  1. An Optimized Method of Hardware Implementation for LHash in the Embedded System

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    cover image ACM Other conferences
    CSAE '18: Proceedings of the 2nd International Conference on Computer Science and Application Engineering
    October 2018
    1083 pages
    ISBN:9781450365123
    DOI:10.1145/3207677
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Association for Computing Machinery

    New York, NY, United States

    Publication History

    Published: 22 October 2018

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    Author Tags

    1. embedded system
    2. hardware implementation
    3. hash function
    4. lightweight
    5. security

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    CSAE '18

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    CSAE '18 Paper Acceptance Rate 189 of 383 submissions, 49%;
    Overall Acceptance Rate 368 of 770 submissions, 48%

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    • (2022)Implementation of Code Integrity Check Module for RISC-V Architecture with AES2022 International Conference on Theoretical and Applied Computer Science and Engineering (ICTASCE)10.1109/ICTACSE50438.2022.10009686(148-152)Online publication date: 29-Sep-2022

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