research-article

System-Level Analysis of 3D ICs with Thermal TSVs

Authors:

Ayed Alqahtani,

Nader BagherzadehAuthors Info & Claims

ACM Journal on Emerging Technologies in Computing Systems (JETC), Volume 14, Issue 3

Article No.: 37, Pages 1 - 16

https://doi.org/10.1145/3264736

Published: 23 October 2018 Publication History

Abstract

3D stacking of integrated circuits (ICs) provides significant advantages in saving device footprints, improving power management, and continuing performance enhancement, particularly for many-core systems. However, the stacked structure makes the heat dissipation a challenging issue. While Thermal Through Silicon Via (TTSV) is a promising way of lowering the thermal resistance of dies, past research has either overestimated or underestimated the effects of TTSVs as a consequence of the lack of detailed 3D IC models or system-level simulations. Here, we propose a simulation flow to accurately simulate TTSV effects on 3D ICs. We adopt benchmarks from Splash-2 running on a full-system mode of the gem5 simulator, which generates all the system component activities. McPAT is used to generate the corresponding power consumption and the power traces are fed to HotSpot for thermal simulation. The temperature profiles of 2D and 3D Nehalem-like ×86 processors are compared. TTSVs are later placed close to hotspot regions to facilitate heat dissipation; the peak temperature of 3D Nehalem is reduced by 5--25% with a small area overhead of 6%. By using a detailed 3D thermal model, full-system simulation, and a validated thermal simulator, our results show accurate thermal analysis of 3D ICs.

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Lu LFu XHu RYang FLin JBai ZMa K(2024)Novel accurate steady-state thermal resistance model for power chips embedded in TTSVs heat dissipation arrayMicroelectronics Journal10.1016/j.mejo.2024.106336151(106336)Online publication date: Sep-2024
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Index Terms

System-Level Analysis of 3D ICs with Thermal TSVs
1. Computer systems organization
  1. Architectures
    1. Parallel architectures
      1. Multicore architectures
2. Hardware
  1. Integrated circuits
    1. 3D integrated circuits
  2. Power and energy
    1. Thermal issues
      1. Temperature monitoring
      2. Temperature simulation and estimation

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Published In

cover image ACM Journal on Emerging Technologies in Computing Systems

ACM Journal on Emerging Technologies in Computing Systems Volume 14, Issue 3

July 2018

150 pages

ISSN:1550-4832

EISSN:1550-4840

DOI:10.1145/3287773

Editor:
Yuan Xie
University of California, Santa Barbara, USA

Issue’s Table of Contents

Copyright © 2018 ACM.

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Association for Computing Machinery

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ACM Journals for the Design of Smart and Connected Systems

Publication History

Published: 23 October 2018

Accepted: 01 August 2018

Revised: 01 April 2018

Received: 01 December 2017

Published in JETC Volume 14, Issue 3

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Cited By

Hu RLu LBai ZYang FMa KDing Z(2024)Investigation of heat dissipation structure embedded in substrate of power chip based on grid-type thermal through silicon viasIEICE Electronics Express10.1587/elex.21.2024018521:11(20240185-20240185)Online publication date: 10-Jun-2024
https://doi.org/10.1587/elex.21.20240185
Lu LFu XHu RYang FLin JBai ZMa K(2024)Novel accurate steady-state thermal resistance model for power chips embedded in TTSVs heat dissipation arrayMicroelectronics Journal10.1016/j.mejo.2024.106336151(106336)Online publication date: Sep-2024
https://doi.org/10.1016/j.mejo.2024.106336
Patil CSuma M(2022)Design and implementation of thermal collection networks in 3-D IC structuresHeliyon10.1016/j.heliyon.2022.e087198:1(e08719)Online publication date: Jan-2022
https://doi.org/10.1016/j.heliyon.2022.e08719
Wang HWu QWang CWang R(2022)A universal high-efficiency cooling structure for high-power integrated circuits☆Applied Thermal Engineering10.1016/j.applthermaleng.2022.118849215(118849)Online publication date: Oct-2022
https://doi.org/10.1016/j.applthermaleng.2022.118849
Shan GLi GChen DYang ZLi DYang Y(2021)An Anisotropic Equivalent Thermal Model for Shield Differential Through-Silicon ViasMicromachines10.3390/mi1210122312:10(1223)Online publication date: 7-Oct-2021
https://doi.org/10.3390/mi12101223
Wang KSun HWang K(2021)A Micro-Channel Cooling Model for a Three-Dimensional Integrated Circuit Considering Through-Silicon ViasMicro and Nanosystems10.2174/187640291266620012315400113:1(49-54)Online publication date: Mar-2021
https://doi.org/10.2174/1876402912666200123154001
Salvi SJain A(2021)A Review of Recent Research on Heat Transfer in Three-Dimensional Integrated Circuits (3-D ICs)IEEE Transactions on Components, Packaging and Manufacturing Technology10.1109/TCPMT.2021.306403011:5(802-821)Online publication date: May-2021
https://doi.org/10.1109/TCPMT.2021.3064030
Patil CSuma M(2021)An Efficient Thermal Removal Solution for the Monolithic 2-D/2.5-D/3-D ICs2021 IEEE 3rd PhD Colloquium on Ethically Driven Innovation and Technology for Society (PhD EDITS)10.1109/PhDEDITS53295.2021.9649523(1-2)Online publication date: 13-Nov-2021
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Kim JRen ZYuksel ADede EBandaru POh DLee J(2020)Recent Advances in Thermal Metamaterials and Their Future Applications for Electronics PackagingJournal of Electronic Packaging10.1115/1.4047414143:1Online publication date: 29-Jun-2020
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Ren ZAlqahtani ABagherzadeh NLee J(2020)Thermal TSV Optimization and Hierarchical Floorplanning for 3-D Integrated CircuitsIEEE Transactions on Components, Packaging and Manufacturing Technology10.1109/TCPMT.2020.297038210:4(599-610)Online publication date: Apr-2020
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