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SAQIP: A Scalable Architecture for Quantum Information Processors

Published: 18 April 2019 Publication History
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  • Abstract

    Proposing an architecture that efficiently compensates for the inefficiencies of physical hardware with extra resources is one of the key issues in quantum computer design. Although the demonstration of quantum systems has been limited to some dozen qubits, scaling the current small-sized lab quantum systems to large-scale quantum systems that are capable of solving meaningful practical problems can be the main goal of much research. Focusing on this issue, in this article a scalable architecture for quantum information processors, called SAQIP, is proposed. Moreover, a flow is presented to map and schedule a quantum circuit on this architecture. Experimental results show that the proposed architecture and design flow decrease the average latency and the average area of quantum circuits by about 81% and 11%, respectively, for the attempted benchmarks.

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      cover image ACM Transactions on Architecture and Code Optimization
      ACM Transactions on Architecture and Code Optimization  Volume 16, Issue 2
      June 2019
      317 pages
      ISSN:1544-3566
      EISSN:1544-3973
      DOI:10.1145/3325131
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      Publication History

      Published: 18 April 2019
      Accepted: 01 February 2019
      Revised: 01 January 2019
      Received: 01 July 2018
      Published in TACO Volume 16, Issue 2

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      Author Tags

      1. Quantum architecture
      2. mapping
      3. quantum circuits
      4. scheduling

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