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RIP-RH: Preventing Rowhammer-based Inter-Process Attacks

Published: 02 July 2019 Publication History

Abstract

Run-time attacks pose a continuous threat to the security of computer systems. These attacks aim at hijacking the operation of a computer program by subverting its execution at run time. While conventional run-time attacks usually require memory-corruption vulnerabilities in the program, hardware bugs represent an increasingly popular attack vector. Rowhammer represents a vulnerability in the design of DRAM modules that allows an adversary to modify memory locations in physical proximity to attacker-controlled memory on the module without accessing them. This is a serious threat to real-world systems, since DRAM is used as main memory on virtually all platforms. Recent research proposed defenses against rowhammer, such by patching the memory controller in hardware, or statically partitioning physical memory to protect the operating system kernel from a user space adversary. However, sharing DRAM memory securely between a number of different entities currently remains as an open problem. In this paper, we present RIP-RH, a DRAM-aware memory allocator that allows for dynamic management of multiple user-space processes. RIP-RH ensures that the memory partitions belonging to individual processes are physically isolated. In our detailed evaluation we demonstrate that our prototype implementation of RIP-RH incurs a modest run-time overhead of 3.17% for standard benchmarks and offers practical performance in a number of real-world scenarios.

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Cited By

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  • (2024)Exploring the Correlation Between DRAM Latencies and Rowhammer Attacks2024 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)10.1109/ISVLSI61997.2024.00086(445-450)Online publication date: 1-Jul-2024
  • (2024)CoMeT: Count-Min-Sketch-based Row Tracking to Mitigate RowHammer at Low Cost2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA57654.2024.00050(593-612)Online publication date: 2-Mar-2024
  • (2024)Spatial Variation-Aware Read Disturbance Defenses: Experimental Analysis of Real DRAM Chips and Implications on Future Solutions2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA57654.2024.00048(560-577)Online publication date: 2-Mar-2024
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cover image ACM Conferences
Asia CCS '19: Proceedings of the 2019 ACM Asia Conference on Computer and Communications Security
July 2019
708 pages
ISBN:9781450367523
DOI:10.1145/3321705
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than the author(s) must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected].

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Published: 02 July 2019

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Cited By

View all
  • (2024)Exploring the Correlation Between DRAM Latencies and Rowhammer Attacks2024 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)10.1109/ISVLSI61997.2024.00086(445-450)Online publication date: 1-Jul-2024
  • (2024)CoMeT: Count-Min-Sketch-based Row Tracking to Mitigate RowHammer at Low Cost2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA57654.2024.00050(593-612)Online publication date: 2-Mar-2024
  • (2024)Spatial Variation-Aware Read Disturbance Defenses: Experimental Analysis of Real DRAM Chips and Implications on Future Solutions2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA57654.2024.00048(560-577)Online publication date: 2-Mar-2024
  • (2023)RAMPART: RowHammer Mitigation and Repair for Server Memory SystemsProceedings of the International Symposium on Memory Systems10.1145/3631882.3631886(1-15)Online publication date: 2-Oct-2023
  • (2023) Implicit Hammer : Cross-Privilege-Boundary Rowhammer Through Implicit Accesses IEEE Transactions on Dependable and Secure Computing10.1109/TDSC.2022.321466620:5(3716-3733)Online publication date: 1-Sep-2023
  • (2023)Scalable and Secure Row-Swap: Efficient and Safe Row Hammer Mitigation in Memory Systems2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA56546.2023.10070999(374-389)Online publication date: Feb-2023
  • (2023)PT-Guard: Integrity-Protected Page Tables to Defend Against Breakthrough Rowhammer Attacks2023 53rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN)10.1109/DSN58367.2023.00022(95-108)Online publication date: Jun-2023
  • (2022)Randomized row-swap: mitigating Row Hammer by breaking spatial correlation between aggressor and victim rowsProceedings of the 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems10.1145/3503222.3507716(1056-1069)Online publication date: 28-Feb-2022
  • (2022)MOESI-primeProceedings of the 49th Annual International Symposium on Computer Architecture10.1145/3470496.3527427(670-684)Online publication date: 18-Jun-2022
  • (2022)AQUA: Scalable Rowhammer Mitigation by Quarantining Aggressor Rows at Runtime2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO)10.1109/MICRO56248.2022.00022(108-123)Online publication date: Oct-2022
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