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Performance analysis and technology of 3-D ICs

Authors:

Krishna C. Saraswat,

Shukri J. Souri,

Kaustav Banerjee,

Pawan KapurAuthors Info & Claims

SLIP '00: Proceedings of the 2000 international workshop on System-level interconnect prediction

Pages 85 - 90

https://doi.org/10.1145/333032.333037

Published: 08 April 2000 Publication History

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Performance analysis and technology of 3-D ICs

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Published In

SLIP '00: Proceedings of the 2000 international workshop on System-level interconnect prediction

April 2000

149 pages

ISBN:1581132492

DOI:10.1145/333032

Chairmen:
Dirk Stroobandt
Ghent Univ., Gent, Belgium
,
Phillip Christie
Univ. of Delaware
,
Andrew Kahng
Univ. of California-Los Angles, Los Angeles

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 08 April 2000

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SLIP00: International Workshop on System-Level Interconnect Prediction

April 8 - 9, 2000

California, San Diego, USA

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Overall Acceptance Rate 6 of 8 submissions, 75%

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Cited By

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Tavakoli ASalimpour MVafai K(2021)Geometrical optimization of boron arsenide inserts embedded in a heat spreader to improve its cooling performance for three dimensional integrated circuitsNumerical Heat Transfer, Part A: Applications10.1080/10407782.2021.1947626(1-22)Online publication date: 21-Jul-2021
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Zhang ZLiauw YChen CWong S(2015)Monolithic 3-D FPGAsProceedings of the IEEE10.1109/JPROC.2015.2433954103:7(1197-1210)Online publication date: Jul-2015
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Goplen BSapatnekar S(2006)Placement of thermal vias in 3-D ICs using various thermal objectivesIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2006.87006925:4(692-709)Online publication date: 1-Nov-2006
https://dl.acm.org/doi/10.1109/TCAD.2006.870069
Nguyen VChristie PMarkov IHutton M(2005)The impact of interstratal interconnect density on the performance of three-dimensional integrated circuitsProceedings of the 2005 international workshop on System level interconnect prediction10.1145/1053355.1053372(73-78)Online publication date: 2-Apr-2005
https://dl.acm.org/doi/10.1145/1053355.1053372
Deodhar VDavis J(2005)Designing for signal integrity in wave-pipelined SOC global interconnects2005 Joint 30th International Conference on Infrared and Millimeter Waves and 13th International Conference on Terahertz Electronics10.1109/SOCC.2005.1554496(207-210)Online publication date: 2005
https://doi.org/10.1109/SOCC.2005.1554496
Dambre JStroobandt DVan Campenhout J(2004)Toward the accurate prediction of placement wire length distributions in VLSI circuitsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2004.82585112:4(339-348)Online publication date: 1-Apr-2004
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Nasrullah JBurr JTyler G(2003)An edge-defined nano-lithography technique suitable for low thermal budget process and 3-D stackable devices2003 Third IEEE Conference on Nanotechnology, 2003. IEEE-NANO 2003.10.1109/NANO.2003.1230956(502-505)Online publication date: 2003
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Yang XBozorgzadeh ESarrafzadeh MChristie PDavis JSylvester D(2001)Wirelength estimation based on rent exponents of partitioning and placementProceedings of the 2001 international workshop on System-level interconnect prediction10.1145/368640.368658(25-31)Online publication date: 1-Mar-2001
https://dl.acm.org/doi/10.1145/368640.368658

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