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Closing the gap between analog and digital

Published: 02 June 2019 Publication History

Abstract

This paper presents a highly effective method for parallel hard fault simulation and test specification development. The proposed method formulates the fault simulation problem as a problem of estimating the fault value based on the distance between the output parameter distribution of the fault-free and the faulty circuit. We demonstrate the effectiveness and practicality of our proposed method by showing results on different designs. This approach extended by parametric fault testing has been implemented as an automated tools set for IC testing.

References

[1]
L. Milor and V. Visvanathan, "Detection of Catastrophic Faults in Analog Integrated Circuits", IEEE Trans. Computer-Aided Design, Vol. CAD-8, no. 2, pp. 114-130, Feb. 1989.
[2]
Manoj Sachdev, "A Realistic Defect Oriented Testability Methodology For Analog Circuits", JETTA 1993.
[3]
M. Abramovici, M.A. Breuer, A.D. Friedman, "Digital Systems Testing and Testable Design", IEEE press, 1990.
[4]
Naim B-Hamida, Khaled Saab, David Marche and Bozena Kaminska,"FaultMaxx: A Perturbation Based Fault Modeling and Simulation for Mixed-Signal Circuits", Asien Test Conference. October 1997. pp. 182- 187
[5]
Naim B. Hamida, Khaled. Saab, David. Marche, B. Kaminska and Gay. Quesnel, "LIMSoft: Automated Tool for Design and Test Integration of Analog Circuits", International Test Conference 1996. pp. 56-71
[6]
Naveena Nagi and Jacob A. Abraham, "Hierarchical Fault Modeling For Analog and Mixed-Signal Circuits", IEEE VLSI Test Symposium 1992, pp92-101.
[7]
Naveena Nagi, A. Chatterjee, Jacob A. Abraham, "Fault Simulation Of Linear Analog Circuits", Analog Integrated Circuits and Signal Processing 1993.
[8]
R. J. A. Harvey, A. M. D. Richardson, E, M. J. G. Bruls, K. Baker, "Analog Fault Simulation Based on Layout Dependent Fault Models", ITC 95, pp-641-649.
[9]
Saab Khaled, Naim B. Hamida, David Marche and Bozena Kaminska, "LIMSoft: Automated Tool for Sensitivity Analysis and Test Vector Generation", IEE Proceedings on Circuits, Devices and Systems. December 1996. pp.386-392
[10]
Stephan W. Director and Ronald A. Rohrer, "Automated Network Design- The Frequency Domain Case", IEEE Trans. on Circuit Theory, CT-16, no 3, August 1969, pp. 330-337.
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Stephan W. Director and Ronald A. Rohrer, "The Generalized Adjoint Network and Network Sensitivities", IEEE Trans. on Circuit and Theory, Vol. CT- 16, no 3, August 1969, pp. 318-323.
[12]
Tellegen B. D. H., "A General Network Theorem, with Application", Phillips Res. Dept., no. 7, pp. 259-269.
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Meta-Software, "HSPICE User's Manual version H92", Meta-Software, Inc. 1992.

Cited By

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  • (2001)How deep sub micron will boost Internet appliances in the digital home networkInternational Electron Devices Meeting. Technical Digest (Cat. No.01CH37224)10.1109/IEDM.2001.979361(1.1.1-1.1.7)Online publication date: 2001

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cover image ACM Conferences
DAC '00: Proceedings of the 37th Annual Design Automation Conference
June 2000
819 pages
ISBN:1581131879
DOI:10.1145/337292
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 02 June 2019

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Author Tags

  1. fault modeling
  2. fault simulation
  3. hard faults
  4. test vector generation

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DAC00
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DAC00: ACM/IEEE-CAS/EDAC Design Automation Conference
June 5 - 9, 2000
California, Los Angeles, USA

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Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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  • (2001)How deep sub micron will boost Internet appliances in the digital home networkInternational Electron Devices Meeting. Technical Digest (Cat. No.01CH37224)10.1109/IEDM.2001.979361(1.1.1-1.1.7)Online publication date: 2001

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