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SmokeBomb: effective mitigation against cache side-channel attacks on the ARM architecture

Published: 15 June 2020 Publication History

Abstract

Cache side-channel attacks abuse microarchitectural designs meant to optimize memory access to infer information about victim processes, threatening data privacy and security. Recently, the ARM architecture has come into the spotlight of cache side-channel attacks with its unprecedented growth in the market.
We propose SmokeBomb, a novel cache side-channel mitigation that functions by explicitly ensuring a private space for each process to safely access sensitive data. The heart of the idea is to use the L1 cache of the CPU core as a private space by which SmokeBomb can give consistent results against cache attacks on the sensitive data, and thus, an attacker cannot distinguish specific data used by the victim. Our experimental results show that SmokeBomb can effectively prevent currently formalized cache attack methods.

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Cited By

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  • (2024)CacheIEE: Cache-Assisted Isolated Execution Environment on ARM Multi-Core PlatformsIEEE Transactions on Dependable and Secure Computing10.1109/TDSC.2023.325141821:1(254-269)Online publication date: Jan-2024
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cover image ACM Conferences
MobiSys '20: Proceedings of the 18th International Conference on Mobile Systems, Applications, and Services
June 2020
496 pages
ISBN:9781450379540
DOI:10.1145/3386901
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than the author(s) must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected].

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Published: 15 June 2020

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  • (2023)Designing Secure Performance Metrics for Last Level Cache2023 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)10.1109/IPDPSW59300.2023.00069(383-392)Online publication date: May-2023
  • (2023)Leaky MDU: ARM Memory Disambiguation Unit Uncovered and Vulnerabilities Exposed2023 60th ACM/IEEE Design Automation Conference (DAC)10.1109/DAC56929.2023.10247985(1-6)Online publication date: 9-Jul-2023
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  • (2022)Eliminating Micro-Architectural Side-Channel Attacks using Near Memory Processing2022 IEEE International Symposium on Secure and Private Execution Environment Design (SEED)10.1109/SEED55351.2022.00023(179-189)Online publication date: Sep-2022
  • (2022)Diminisher: A Linux Kernel Based Countermeasure for TAA VulnerabilityComputer Security. ESORICS 2021 International Workshops10.1007/978-3-030-95484-0_28(477-495)Online publication date: 8-Feb-2022

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