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A Unified Printed Circuit Board Routing Algorithm With Complicated Constraints and Differential Pairs

Authors:

Chung-Kuan ChengAuthors Info & Claims

ASPDAC '21: Proceedings of the 26th Asia and South Pacific Design Automation Conference

Pages 170 - 175

https://doi.org/10.1145/3394885.3431568

Published: 29 January 2021 Publication History

Abstract

The printed circuit board (PCB) routing problem has been studied extensively in recent years. Due to continually growing net/pin counts, extremely high pin density, and unique physical constraints, the manual routing of PCBs has become a time-consuming task to reach design closure. Previous works break down the problem into escape routing and area routing and focus on these problems separately. However, there is always a gap between these two problems requiring a massive amount of human efforts to fine-tune the algorithms back and forth. Besides, previous works of area routing mainly focus on routing between escaping routed ball-grid-array (BGA) packages. Nevertheless, in practice, many components are not in the form of BGA packages, such as passive devices, decoupling capacitors, and through-hole pin arrays. To mitigate the deficiencies of previous works, we propose a full-board routing algorithm that can handle multiple real-world complicated constraints to facilitate the printed circuit board routing and produce high-quality manufacturable layouts. Experimental results show that our algorithm is effective and efficient. Specifically, for all given test cases, our router can achieve 100% routability without any design rule violation while the other two state-of-the-art routers fail to complete the routing for some test cases and incur design rule violations.

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Cited By

Gao ZDong STang ZYu W(2024)MCMCF-Router: Multi-capacity Ordered Escape Routing Algorithms for Grid/Staggered Pin ArrayACM Transactions on Design Automation of Electronic Systems10.1145/3695253Online publication date: 14-Sep-2024
https://dl.acm.org/doi/10.1145/3695253
Gao ZDong SCheng ZYu W(2024)MORE-Router+: Multilayer Multi-capacity ORdered Escape Routing via Bus-oriented Layer Assignment2024 25th International Symposium on Quality Electronic Design (ISQED)10.1109/ISQED60706.2024.10528693(1-7)Online publication date: 3-Apr-2024
https://doi.org/10.1109/ISQED60706.2024.10528693
Chen JZhou YLiu QZhang X(2023)A Novel Global Routing Algorithm for Printed Circuit Boards Based on Triangular GridElectronics10.3390/electronics1224494212:24(4942)Online publication date: 8-Dec-2023
https://doi.org/10.3390/electronics12244942
Show More Cited By

A Unified Printed Circuit Board Routing Algorithm With Complicated Constraints and Differential Pairs
1. Applied computing
  1. Physical sciences and engineering
    1. Engineering
2. Hardware
  1. Electronic design automation
    1. Physical design (EDA)

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Published In

cover image ACM Conferences

ASPDAC '21: Proceedings of the 26th Asia and South Pacific Design Automation Conference

January 2021

930 pages

ISBN:9781450379991

DOI:10.1145/3394885

Copyright © 2021 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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SIGDA: ACM Special Interest Group on Design Automation
IEEE CAS
IEEE CEDA

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 29 January 2021

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ASPDAC '21

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SIGDA

ASPDAC '21: 26th Asia and South Pacific Design Automation Conference

January 18 - 21, 2021

Tokyo, Japan

Acceptance Rates

ASPDAC '21 Paper Acceptance Rate 111 of 368 submissions, 30%;

Overall Acceptance Rate 466 of 1,454 submissions, 32%

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ASPDAC '25

Sponsor:
sigda

30th Asia and South Pacific Design Automation Conference

January 20 - 23, 2025

Tokyo , Japan

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Cited By

Gao ZDong STang ZYu W(2024)MCMCF-Router: Multi-capacity Ordered Escape Routing Algorithms for Grid/Staggered Pin ArrayACM Transactions on Design Automation of Electronic Systems10.1145/3695253Online publication date: 14-Sep-2024
https://dl.acm.org/doi/10.1145/3695253
Gao ZDong SCheng ZYu W(2024)MORE-Router+: Multilayer Multi-capacity ORdered Escape Routing via Bus-oriented Layer Assignment2024 25th International Symposium on Quality Electronic Design (ISQED)10.1109/ISQED60706.2024.10528693(1-7)Online publication date: 3-Apr-2024
https://doi.org/10.1109/ISQED60706.2024.10528693
Chen JZhou YLiu QZhang X(2023)A Novel Global Routing Algorithm for Printed Circuit Boards Based on Triangular GridElectronics10.3390/electronics1224494212:24(4942)Online publication date: 8-Dec-2023
https://doi.org/10.3390/electronics12244942
He YLi HLuo GBao F(2023)Two-stage PCB Routing Using Polygon-based Dynamic Partitioning and MCTS2023 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE56975.2023.10137062(1-2)Online publication date: Apr-2023
https://doi.org/10.23919/DATE56975.2023.10137062
Chen HHo CWu SLu WHuang PChang HLiu CChinnery DHui-Ru Jiang I(2023)Reshaping System Design in 3D IntegrationProceedings of the 2023 International Symposium on Physical Design10.1145/3569052.3578918(71-77)Online publication date: 26-Mar-2023
https://dl.acm.org/doi/10.1145/3569052.3578918
Chen TXiong SHe HYu B(2023)TRouter: Thermal-Driven PCB Routing via Nonlocal Crisscross Attention NetworksIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2023.324354442:10(3388-3401)Online publication date: Oct-2023
https://doi.org/10.1109/TCAD.2023.3243544
Huang PKoyama TChang KHuang CWang CHo T(2023)Deep Learning based Refinement for Package Substrate Routing2023 IEEE 73rd Electronic Components and Technology Conference (ECTC)10.1109/ECTC51909.2023.00320(1871-1874)Online publication date: May-2023
https://doi.org/10.1109/ECTC51909.2023.00320
Liu QLin DChen CHe HChen JChang Y(2023)A Matching Based Escape Routing Algorithm with Variable Design Rules and Constraints2023 60th ACM/IEEE Design Automation Conference (DAC)10.1109/DAC56929.2023.10247781(1-6)Online publication date: 9-Jul-2023
https://doi.org/10.1109/DAC56929.2023.10247781
Ma BXu NWu HLiu MSun S(2022)Routing Algorithm for Flexible Printed Circuit Channel AreaJournal of Computer-Aided Design & Computer Graphics10.3724/SP.J.1089.2022.1946534:08(1179-1185)Online publication date: 2-Dec-2022
https://doi.org/10.3724/SP.J.1089.2022.19465
Wen HCai YHsu YChang Y(2022)Via-Based Redistribution Layer Routing for InFO Packages With Irregular Pad StructuresIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.315506941:12(5554-5567)Online publication date: Dec-2022
https://doi.org/10.1109/TCAD.2022.3155069

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