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RecPipe: Co-designing Models and Hardware to Jointly Optimize Recommendation Quality and Performance

Authors:

Mark Wilkening,

Hsien-Hsin Sean Lee,

Carole-Jean Wu, and

David BrooksAuthors Info & Claims

MICRO '21: MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture

October 2021

Pages 870 - 884

https://doi.org/10.1145/3466752.3480127

Published: 17 October 2021 Publication History

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Abstract

Deep learning recommendation systems must provide high quality, personalized content under strict tail-latency targets and high system loads. This paper presents RecPipe, a system to jointly optimize recommendation quality and inference performance. Central to RecPipe is decomposing recommendation models into multi-stage pipelines to maintain quality while reducing compute complexity and exposing distinct parallelism opportunities. RecPipe implements an inference scheduler to map multi-stage recommendation engines onto commodity, heterogeneous platforms (e.g., CPUs, GPUs). While the hardware-aware scheduling improves ranking efficiency, the commodity platforms suffer from many limitations requiring specialized hardware. Thus, we design RecPipeAccel (RPAccel), a custom accelerator that jointly optimizes quality, tail-latency, and system throughput. RPAccel is designed specifically to exploit the distinct design space opened via RecPipe. In particular, RPAccel processes queries in sub-batches to pipeline recommendation stages, implements dual static and dynamic embedding caches, a set of top-k filtering units, and a reconfigurable systolic array. Compared to previously proposed specialized recommendation accelerators and at iso-quality, we demonstrate that RPAccel improves latency and throughput by 3 × and 6 ×.

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Cited By

Hsia SGupta UAcun BArdalani NZhong PWei GBrooks DWu CAamodt TJerger NSwift M(2023)MP-Rec: Hardware-Software Co-design to Enable Multi-path RecommendationProceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 310.1145/3582016.3582068(449-465)Online publication date: 25-Mar-2023
https://dl.acm.org/doi/10.1145/3582016.3582068
Jain RCheng SKalagi VSanghavi VKaul SArunachalam MMaeng KJog ASivasubramaniam AKandemir MDas CSolihin YHeinrich M(2023)Optimizing CPU Performance for Recommendation Systems At-ScaleProceedings of the 50th Annual International Symposium on Computer Architecture10.1145/3579371.3589112(1-15)Online publication date: 17-Jun-2023
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MICRO '21: MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture

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DOI:10.1145/3466752

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Cited By

Hsia SGupta UAcun BArdalani NZhong PWei GBrooks DWu CAamodt TJerger NSwift M(2023)MP-Rec: Hardware-Software Co-design to Enable Multi-path RecommendationProceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 310.1145/3582016.3582068(449-465)Online publication date: 25-Mar-2023
https://dl.acm.org/doi/10.1145/3582016.3582068
Jain RCheng SKalagi VSanghavi VKaul SArunachalam MMaeng KJog ASivasubramaniam AKandemir MDas CSolihin YHeinrich M(2023)Optimizing CPU Performance for Recommendation Systems At-ScaleProceedings of the 50th Annual International Symposium on Computer Architecture10.1145/3579371.3589112(1-15)Online publication date: 17-Jun-2023
https://dl.acm.org/doi/10.1145/3579371.3589112
Gong YYin MHuang LXiao JSui YDeng CYuan BSolihin YHeinrich M(2023)ETTE: Efficient Tensor-Train-based Computing Engine for Deep Neural NetworksProceedings of the 50th Annual International Symposium on Computer Architecture10.1145/3579371.3589103(1-13)Online publication date: 17-Jun-2023
https://dl.acm.org/doi/10.1145/3579371.3589103
Liu HZheng LHuang YLiu CYe XYuan JLiao XJin HXue JSolihin YHeinrich M(2023)Accelerating Personalized Recommendation with Cross-level Near-Memory ProcessingProceedings of the 50th Annual International Symposium on Computer Architecture10.1145/3579371.3589101(1-13)Online publication date: 17-Jun-2023
https://dl.acm.org/doi/10.1145/3579371.3589101
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