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PIPF-DRAM: processing in precharge-free DRAM

Published: 23 August 2022 Publication History

Abstract

To alleviate costly data communication among processing cores and memory modules, parallel processing-in-memory (PIM) is a promising approach which exploits the huge available internal memory bandwidth. High capacity, wide row size, and maturity of DRAM technology, make DRAM an alluring structure for PIM. However, dense layout, high process variation, and noise vulnerability of DRAMs make it very challenging to apply PIM for DRAMs in practice. This work proposes a PIM structure which eliminates these DRAM limitations, exploiting a precharge-free DRAM (PF-DRAM) structure. The proposed PIM structure, called PIPF-DRAM, performs parallel bitwise operations only by modifying control signal sequences in PF-DRAM, with almost zero structural and circuit modifications. Comparing the state-of-the-art PIM techniques, PIPF-DRAM is 4.2× more robust to process variation, 4.1% faster in average cycle time of operations, and consumes 66.1% less energy.

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Cited By

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  • (2024)HiFi-DRAM: Enabling High-fidelity DRAM Research by Uncovering Sense Amplifiers with IC Imaging2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA)10.1109/ISCA59077.2024.00020(133-149)Online publication date: 29-Jun-2024
  • (2023)CoolDRAM: An Energy-Efficient and Robust DRAM2023 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)10.1109/ISLPED58423.2023.10244464(1-6)Online publication date: 7-Aug-2023
  • (2023)Resonant Compute-In-Memory (rCIM) 10T SRAM Macro for Boolean Logic2023 IEEE 41st International Conference on Computer Design (ICCD)10.1109/ICCD58817.2023.00026(110-117)Online publication date: 6-Nov-2023
  • Show More Cited By

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cover image ACM Conferences
DAC '22: Proceedings of the 59th ACM/IEEE Design Automation Conference
July 2022
1462 pages
ISBN:9781450391429
DOI:10.1145/3489517
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 23 August 2022

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Author Tags

  1. DRAM
  2. bulk bitwise operation
  3. energy consumption
  4. process variation
  5. processing-in-memory

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DAC '22
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DAC '22: 59th ACM/IEEE Design Automation Conference
July 10 - 14, 2022
California, San Francisco

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Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Cited By

View all
  • (2024)HiFi-DRAM: Enabling High-fidelity DRAM Research by Uncovering Sense Amplifiers with IC Imaging2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA)10.1109/ISCA59077.2024.00020(133-149)Online publication date: 29-Jun-2024
  • (2023)CoolDRAM: An Energy-Efficient and Robust DRAM2023 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)10.1109/ISLPED58423.2023.10244464(1-6)Online publication date: 7-Aug-2023
  • (2023)Resonant Compute-In-Memory (rCIM) 10T SRAM Macro for Boolean Logic2023 IEEE 41st International Conference on Computer Design (ICCD)10.1109/ICCD58817.2023.00026(110-117)Online publication date: 6-Nov-2023
  • (2023)A Hierarchically Reconfigurable SRAM-Based Compute-in-Memory Macro for Edge Computing2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS)10.1109/AICAS57966.2023.10168564(1-5)Online publication date: 11-Jun-2023
  • (2022)Flash-Cosmos: In-Flash Bulk Bitwise Operations Using Inherent Computation Capability of NAND Flash MemoryProceedings of the 55th Annual IEEE/ACM International Symposium on Microarchitecture10.1109/MICRO56248.2022.00069(937-955)Online publication date: 1-Oct-2022

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