short-paper

Low-power option Greeks: Efficiency-driven market risk analysis using FPGAs

Authors:

Mark Klaisoongnoen,

Oliver Thomson BrownAuthors Info & Claims

HEART '22: Proceedings of the 12th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies

Pages 95 - 101

https://doi.org/10.1145/3535044.3535059

Published: 09 June 2022 Publication History

Abstract

Quantitative finance is the use of mathematical models to analyse financial markets and securities. Typically requiring significant amounts of computation, an important question is the role that novel architectures can play in accelerating these models. In this paper we explore the acceleration of the industry standard Securities Technology Analysis Center’s (STAC) derivatives risk analysis benchmark STAC-A2™ by porting the Heston stochastic volatility model and Longstaff and Schwartz path reduction onto a Xilinx Alveo U280 FPGA with a focus on efficiency-driven computing.

Describing in detail the steps undertaken to optimise the algorithm for the FPGA, we then leverage the flexibility provided by the reconfigurable architecture to explore choices around numerical precision and representation. Insights gained are then exploited in our final performance and energy measurements, where for the efficiency improvement metric we achieve between an 8 times and 185 times improvement on the FPGA compared to two 24-core Intel Xeon Platinum CPUs. The result of this work is not only a show-case for the market risk analysis workload on FPGAs, but furthermore a set of efficiency driven techniques and lessons learnt that can be applied to quantitative finance and computational workloads on reconfigurable architectures more generally.

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Digital Library

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Digital Library

Cited By

O Mahony AHanzon BPopovici E(2024)The Role of FPGAs in Modern Option Pricing Techniques: A SurveyElectronics10.3390/electronics1316318613:16(3186)Online publication date: 12-Aug-2024
https://doi.org/10.3390/electronics13163186
Rodriguez-Canal GBrown NJamieson MBauer ELydike AGrosser T(2023)Stencil-HMLS: A multi-layered approach to the automatic optimisation of stencil codes on FPGAProceedings of the SC '23 Workshops of The International Conference on High Performance Computing, Network, Storage, and Analysis10.1145/3624062.3624543(556-565)Online publication date: 12-Nov-2023
https://dl.acm.org/doi/10.1145/3624062.3624543
Klaisoongnoen MBrown NBrown O(2022)Fast and energy-efficient derivatives risk analysis: Streaming option Greeks on Xilinx and Intel FPGAs2022 IEEE/ACM International Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC)10.1109/H2RC56700.2022.00008(18-27)Online publication date: Nov-2022
https://doi.org/10.1109/H2RC56700.2022.00008

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HEART '22: Proceedings of the 12th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies

June 2022

114 pages

ISBN:9781450396608

DOI:10.1145/3535044

Copyright © 2022 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 09 June 2022

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Short-paper
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Refereed limited

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EPSRC

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HEART2022

HEART2022: International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies

June 9 - 10, 2022

Tsukuba, Japan

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HEART '22 Paper Acceptance Rate 10 of 21 submissions, 48%;

Overall Acceptance Rate 22 of 50 submissions, 44%

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Cited By

O Mahony AHanzon BPopovici E(2024)The Role of FPGAs in Modern Option Pricing Techniques: A SurveyElectronics10.3390/electronics1316318613:16(3186)Online publication date: 12-Aug-2024
https://doi.org/10.3390/electronics13163186
Rodriguez-Canal GBrown NJamieson MBauer ELydike AGrosser T(2023)Stencil-HMLS: A multi-layered approach to the automatic optimisation of stencil codes on FPGAProceedings of the SC '23 Workshops of The International Conference on High Performance Computing, Network, Storage, and Analysis10.1145/3624062.3624543(556-565)Online publication date: 12-Nov-2023
https://dl.acm.org/doi/10.1145/3624062.3624543
Klaisoongnoen MBrown NBrown O(2022)Fast and energy-efficient derivatives risk analysis: Streaming option Greeks on Xilinx and Intel FPGAs2022 IEEE/ACM International Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC)10.1109/H2RC56700.2022.00008(18-27)Online publication date: Nov-2022
https://doi.org/10.1109/H2RC56700.2022.00008

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