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Analyzing the Cost of Safety for Vectorized Bytecode in Dynamically-Typed Languages

Authors:

Nicolás Rainhart,

Guillermo Polito,

Pablo Tesone,

Stephane DucasseAuthors Info & Claims

MPLR '22: Proceedings of the 19th International Conference on Managed Programming Languages and Runtimes

Page 140

https://doi.org/10.1145/3546918.3560803

Published: 30 November 2022 Publication History

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Abstract

Vector instructions are a class of processor instructions that allow data level parallelism by performing the same instruction on multiple pieces of data, instead of a single one as usual. There are two possible approaches to achieve this: add virtual machine intrinsics that use vector instructions, or extend the bytecode set with vector operations that are then mapped to processor vector instructions. We implemented both approaches in the Pharo VM and analyzed the impact of such safety checks on performance. We found that the most significant difference in performance between intrinsic methods and bytecode operations stems from the latter performing redundant type checking on bytecode parameters, bounds checking on array accesses, and overflow tests on array iterators.

Reference

[1]

Stéphane Ducasse, Dmitri Zagidulin, Nicolai Hess, Dimitris Chloupis Originally written by A. Black, S. Ducasse, O. Nierstrasz, D. Pollet with D. Cassou, and M. Denker. 2017. Pharo by Example 5. Square Bracket Associates. 376 pages. http://books.pharo.org

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Index Terms

Analyzing the Cost of Safety for Vectorized Bytecode in Dynamically-Typed Languages
1. Computer systems organization
  1. Architectures
    1. Parallel architectures
      1. Single instruction, multiple data
2. Software and its engineering
  1. Software notations and tools
    1. Compilers

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MPLR '22: Proceedings of the 19th International Conference on Managed Programming Languages and Runtimes

September 2022

161 pages

ISBN:9781450396967

DOI:10.1145/3546918

Permission to make digital or hard copies of part or all of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for third-party components of this work must be honored. For all other uses, contact the Owner/Author.

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Association for Computing Machinery

New York, NY, United States

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Published: 30 November 2022

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MPLR '22

MPLR '22: 19th International Conference on Managed Programming Languages and Runtimes

September 14 - 15, 2022

Brussels, Belgium

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Speculatively vectorized bytecode

DITVA: Dynamic Inter-Thread Vectorization Architecture

Virtual machine showdown: Stack versus registers

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