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Causality based generation of directed test cases

Published: 28 January 2000 Publication History
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References

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Ilan Beer, Shoham Ben-David, Cindy Eisner and Avner Landver, "Rulebase: An Industry-oriented Formal Verification Tool", Design Automation Conference, 1996.
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W. Canfield, E. A. Emerson and A. Saha, "Checking Formal Specifications Under Simulation", IEEE International Conference on Computer Design, October 1997.
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Y. V. Hoskote, J. A. Abraham and D. S. Fussell, "Automated Verification of Temporal Properties Specified as State Machines in VHDL", Proceedings Fifth Great Lakes Symposium on VLSI, March 1995.
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Y. Hoskote, J. Abraham, D. Fussell and J. Moondanos, "Automatic Verification of Implementations of Large Circuits Against HDL Specifications", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, March 1997.
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D. Moundanos, J. Abraham and Y. Hoskote, "A Unified Framework for Design Validation and Manufacturing Test", Proceedings IEEE International Test Conference, October 1996.
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S. P. Rajan and Masahiro Fujita, "Integration of High-level Modeling, Formal Verification, and High-level Synthesis in ATM Switch Design", IEEE International Conference on VLSI Design, January 1998.
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Cited By

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  • (2010)Increasing the efficiency of simulation-based functional verification through unsupervised support vector analysisIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2009.203434729:1(138-148)Online publication date: 1-Jan-2010
  • (2009)Design validation of multithreaded architectures using concurrent threads evolutionProceedings of the 22nd Annual Symposium on Integrated Circuits and System Design: Chip on the Dunes10.1145/1601896.1601964(1-6)Online publication date: 31-Aug-2009
  • (2008)Functional test selection based on unsupervised support vector analysisProceedings of the 45th annual Design Automation Conference10.1145/1391469.1391536(262-267)Online publication date: 8-Jun-2008

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cover image ACM Conferences
ASP-DAC '00: Proceedings of the 2000 Asia and South Pacific Design Automation Conference
January 2000
691 pages
ISBN:0780359747
DOI:10.1145/368434
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 28 January 2000

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Cited By

View all
  • (2010)Increasing the efficiency of simulation-based functional verification through unsupervised support vector analysisIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2009.203434729:1(138-148)Online publication date: 1-Jan-2010
  • (2009)Design validation of multithreaded architectures using concurrent threads evolutionProceedings of the 22nd Annual Symposium on Integrated Circuits and System Design: Chip on the Dunes10.1145/1601896.1601964(1-6)Online publication date: 31-Aug-2009
  • (2008)Functional test selection based on unsupervised support vector analysisProceedings of the 45th annual Design Automation Conference10.1145/1391469.1391536(262-267)Online publication date: 8-Jun-2008

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