Article

Cached-code compression for energy minimization in embedded processors

Authors:

Luca Benini,

Alberto Macii,

Alberto NannarelliAuthors Info & Claims

ISLPED '01: Proceedings of the 2001 international symposium on Low power electronics and design

Pages 322 - 327

https://doi.org/10.1145/383082.383177

Published: 06 August 2001 Publication History

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References

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H. Lekatsas, J. Henkel, W. Wolf, "Code Compression for Low Power Embedded Systems Design," DAC-00, pp. 294-299, 2000.

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H. Lekatsas, W. Wolf, "Code Compression for Embedded Systems," DAC-00, pp. 516-521, 1998.

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S. Larin, T. Conte, "Compiler-Driven Cached Code Compression Schemes for Embedded ILP Processors," MICRO-32, 1999.

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Cited By

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Sun PNunez-Yanez J(2014)Optimizing Memory Power in Hybrid ARM-FPGA Chips With Lossless Data CompressionProceedings of the FPGA World Conference 201410.1145/2674095.2674097(1-7)Online publication date: 9-Sep-2014
https://dl.acm.org/doi/10.1145/2674095.2674097
Menon S(2014)Studying the code compression design space - A synthesis approachJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2013.11.00160:2(179-193)Online publication date: 1-Feb-2014
https://dl.acm.org/doi/10.1016/j.sysarc.2013.11.001
Dias WMoreno Eda Silva Barreto R(2011)An approach for code compression in run time for embedded systemsProceedings of the 11th international conference on Algorithms and architectures for parallel processing - Volume Part I10.5555/2075416.2075449(349-359)Online publication date: 24-Oct-2011
https://dl.acm.org/doi/10.5555/2075416.2075449
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Index Terms

Cached-code compression for energy minimization in embedded processors
1. Computer systems organization
  1. Embedded and cyber-physical systems
  2. Real-time systems
2. Hardware
  1. Integrated circuits
    1. Semiconductor memory
      1. Dynamic memory

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Published In

ISLPED '01: Proceedings of the 2001 international symposium on Low power electronics and design

August 2001

393 pages

ISBN:1581133715

DOI:10.1145/383082

Chairmen:
Enrico Macii
Politecnico di Torino, Turin, Italy
,
Vivek De
Intel Corporation, Hillsboro, OR
,
Mary Jane Irwin
Penn State Univ., University Park

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 06 August 2001

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SIGDA

ISLPED01: International Symposium on Low Power Electronics and Design

California, Huntington Beach, USA

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ISLPED '01 Paper Acceptance Rate 73 of 194 submissions, 38%;

Overall Acceptance Rate 398 of 1,159 submissions, 34%

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Cited By

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Sun PNunez-Yanez J(2014)Optimizing Memory Power in Hybrid ARM-FPGA Chips With Lossless Data CompressionProceedings of the FPGA World Conference 201410.1145/2674095.2674097(1-7)Online publication date: 9-Sep-2014
https://dl.acm.org/doi/10.1145/2674095.2674097
Menon S(2014)Studying the code compression design space - A synthesis approachJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2013.11.00160:2(179-193)Online publication date: 1-Feb-2014
https://dl.acm.org/doi/10.1016/j.sysarc.2013.11.001
Dias WMoreno Eda Silva Barreto R(2011)An approach for code compression in run time for embedded systemsProceedings of the 11th international conference on Algorithms and architectures for parallel processing - Volume Part I10.5555/2075416.2075449(349-359)Online publication date: 24-Oct-2011
https://dl.acm.org/doi/10.5555/2075416.2075449
Rawlins MGordon-Ross A(2011)On the interplay of loop caching, code compression, and cache configurationProceedings of the 16th Asia and South Pacific Design Automation Conference10.5555/1950815.1950872(243-248)Online publication date: 25-Jan-2011
https://dl.acm.org/doi/10.5555/1950815.1950872
Dias WMoreno Eda Silva Barreto R(2011)An Approach for Code Compression in Run Time for Embedded Systems – A Preliminary ResultsAlgorithms and Architectures for Parallel Processing10.1007/978-3-642-24650-0_30(349-359)Online publication date: 2011
https://doi.org/10.1007/978-3-642-24650-0_30
Bonny THenkel J(2010)Huffman-based code compression techniques for embedded processorsACM Transactions on Design Automation of Electronic Systems10.1145/1835420.183542415:4(1-37)Online publication date: 7-Oct-2010
https://dl.acm.org/doi/10.1145/1835420.1835424
Kothiyal RTarasov VSehgal PZadok EAllalouf MFactor MFeitelson D(2009)Energy and performance evaluation of lossless file data compression on server systemsProceedings of SYSTOR 2009: The Israeli Experimental Systems Conference10.1145/1534530.1534536(1-12)Online publication date: 4-May-2009
https://dl.acm.org/doi/10.1145/1534530.1534536
Bonny THenkel JSciuto D(2008)Instruction re-encoding facilitating dense embedded codeProceedings of the conference on Design, automation and test in Europe10.1145/1403375.1403561(770-775)Online publication date: 10-Mar-2008
https://dl.acm.org/doi/10.1145/1403375.1403561
Bonny THenkel J(2008)Efficient code compression for embedded processorsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2008.200195016:12(1696-1707)Online publication date: 1-Dec-2008
https://dl.acm.org/doi/10.1109/TVLSI.2008.2001950
Bonny THenkel JLauwereins RMadsen J(2007)Efficient code density through look-up table compressionProceedings of the conference on Design, automation and test in Europe10.5555/1266366.1266539(809-814)Online publication date: 16-Apr-2007
https://dl.acm.org/doi/10.5555/1266366.1266539
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