Article

Analysis of quasi-static scheduling techniques in a virtualized reconfigurable machine

Authors:

André DeHonAuthors Info & Claims

FPGA '02: Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays

Pages 196 - 205

https://doi.org/10.1145/503048.503077

Published: 24 February 2002 Publication History

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Abstract

The SCORE compute model uses fixed-size, virtual compute and memory pages connected by stream links to capture the definition of a computation abstracted from the detailed size of the physical hardware. When the number of physical compute pages is smaller than the number of virtual compute pages in the abstract computation graph, the design is time-multiplexed onto the available physical hardware. A key component of this strategy is an automatic scheduler that selects the temporal sequencing of virtual resources onto the physical device. We describe a quasi-static scheduling strategy that retains the full semantic power of the dynamic SCORE flow graph while taking advantage of static scheduling techniques at program load time to hoist most of the computational work out of the inner scheduling loops. This strategy reduces online scheduling work per reconfiguration epoch by an order of magnitude. In addition, a more global perspective available from offline-scheduling improves schedule quality, resulting in a net reduction of total execution time by 46--81%.

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Cited By

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Gurunathan KKartikey KSudarshan TDivyaprabha K(2020)Case for Dynamic Parallelisation using Learning Techniques2020 IEEE 9th International Conference on Communication Systems and Network Technologies (CSNT)10.1109/CSNT48778.2020.9115757(32-39)Online publication date: Apr-2020
https://doi.org/10.1109/CSNT48778.2020.9115757
Beyer MGlesner SCorporaal HStuijk S(2011)Static run-time mode extraction by state partitioning in synchronous process networksProceedings of the 14th International Workshop on Software and Compilers for Embedded Systems10.1145/1988932.1988938(28-37)Online publication date: 27-Jun-2011
https://dl.acm.org/doi/10.1145/1988932.1988938
Cardoso JDiniz PWeinhardt M(2010)Compiling for reconfigurable computingACM Computing Surveys10.1145/1749603.174960442:4(1-65)Online publication date: 23-Jun-2010
https://dl.acm.org/doi/10.1145/1749603.1749604
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Analysis of quasi-static scheduling techniques in a virtualized reconfigurable machine
1. Theory of computation
  1. Theory and algorithms for application domains
    1. Machine learning theory
      1. Reinforcement learning

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Published In

FPGA '02: Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays

February 2002

257 pages

ISBN:1581134525

DOI:10.1145/503048

General Chair:
Martine Schlag,
Program Chair:
Steve Trimberger

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 24 February 2002

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FPGA02

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SIGDA

FPGA02: ACM/SIGDA International Symposium on Field Programmable Gate Arrays

February 24 - 26, 2002

California, Monterey, USA

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Overall Acceptance Rate 125 of 627 submissions, 20%

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Gurunathan KKartikey KSudarshan TDivyaprabha K(2020)Case for Dynamic Parallelisation using Learning Techniques2020 IEEE 9th International Conference on Communication Systems and Network Technologies (CSNT)10.1109/CSNT48778.2020.9115757(32-39)Online publication date: Apr-2020
Beyer MGlesner SCorporaal HStuijk S(2011)Static run-time mode extraction by state partitioning in synchronous process networksProceedings of the 14th International Workshop on Software and Compilers for Embedded Systems10.1145/1988932.1988938(28-37)Online publication date: 27-Jun-2011
Cardoso JDiniz PWeinhardt M(2010)Compiling for reconfigurable computingACM Computing Surveys10.1145/1749603.174960442:4(1-65)Online publication date: 23-Jun-2010
Rupnow KCompton K(2009)SPY vs. SLY: Run-time thread-scheduler aware reconfigurable hardware allocators2009 International Conference on Field-Programmable Technology10.1109/FPT.2009.5377621(353-356)Online publication date: Dec-2009
Resano JClemente JGonzalez CMozos DCatthoor F(2008)Efficiently scheduling runtime reconfigurationsACM Transactions on Design Automation of Electronic Systems10.1145/1391962.139196613:4(1-12)Online publication date: 3-Oct-2008
Wenyin Fu Compton K(2008)Active kernel monitoring to combat scheduler gaming in reconfigurable computing systems2008 International Conference on Field Programmable Logic and Applications10.1109/FPL.2008.4630021(611-614)Online publication date: Sep-2008
Fu WCompton K(2008)Scheduling Intervals for Reconfigurable ComputingProceedings of the 2008 16th International Symposium on Field-Programmable Custom Computing Machines10.1109/FCCM.2008.48(87-96)Online publication date: 14-Apr-2008
Hauck SDeHon A(2007)Reconfigurable ComputingundefinedOnline publication date: 2-Nov-2007
De Brito AMelcher ERosas W(2006)An open-source tool for simulation of partially reconfigurable systems using SystemCProceedings of the IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures10.1109/ISVLSI.2006.23Online publication date: 2-Mar-2006
DeHon AMarkovsky YCaspi EChu MHuang RPerissakis SPozzi LYeh JWawrzynek J(2006)Stream computations organized for reconfigurable executionMicroprocessors and Microsystems10.1016/j.micpro.2006.02.00930:6(334-354)Online publication date: Sep-2006
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