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Using Java to design and test hardware circuits over a classroom network

Authors:

Michael J Jipping,

Steve Marlowe,

Alexander SherstovAuthors Info & Claims

ACM SIGCSE Bulletin, Volume 34, Issue 1

Pages 162 - 166

https://doi.org/10.1145/563517.563401

Published: 27 February 2002 Publication History

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Abstract

A crucial part of the Computer Organization course is the design and analysis of hardware circuits. To teach this part of the course efficiently and to involve the entire class in the design of circuits, we have designed the SCAN system. Starting with a textual specification of a circuit, SCAN generates Java classes that can be used to simulate the way the circuit works. These circuits can be simulated locally or can join with other circuits to simulate larger machine function over a network. This paper describes the SCAN system, the Java classes it generates, and the way we use this in the Computer Organization class.

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Jones, D. "Iowa Logic Simulator", available online: http://www.cs.uiowa.edu/~jones/logicsim.

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Hoffman M(2004)The case for more digital logic in Computer ArchitectureProceedings of the Sixth Australasian Conference on Computing Education - Volume 3010.5555/979968.979987(137-143)Online publication date: 1-Jan-2004
https://dl.acm.org/doi/10.5555/979968.979987
Sherstov A(2003)Distributed visualization of graph algorithmsACM SIGCSE Bulletin10.1145/792548.61201135:1(376-380)Online publication date: 11-Jan-2003
https://dl.acm.org/doi/10.1145/792548.612011
Sherstov AGrissom SKnox DJoyce DDann W(2003)Distributed visualization of graph algorithmsProceedings of the 34th SIGCSE technical symposium on Computer science education10.1145/611892.612011(376-380)Online publication date: 19-Feb-2003
https://dl.acm.org/doi/10.1145/611892.612011
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Published In

ACM SIGCSE Bulletin Volume 34, Issue 1

Inroads: paving the way towards excellence in computing education

March 2002

417 pages

ISSN:0097-8418

DOI:10.1145/563517

Issue’s Table of Contents

SIGCSE '02: Proceedings of the 33rd SIGCSE technical symposium on Computer science education
February 2002
471 pages
ISBN:1581134738
DOI:10.1145/563340
Conference Chairs:
Judith Gersting
University of Hawaii at Hilo
,
Henry M. Walker
Grinnell College
,
Program Chair:
Scott Grissom
Grand Valley State University

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 27 February 2002

Published in SIGCSE Volume 34, Issue 1

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Hoffman M(2004)The case for more digital logic in Computer ArchitectureProceedings of the Sixth Australasian Conference on Computing Education - Volume 3010.5555/979968.979987(137-143)Online publication date: 1-Jan-2004
https://dl.acm.org/doi/10.5555/979968.979987
Sherstov A(2003)Distributed visualization of graph algorithmsACM SIGCSE Bulletin10.1145/792548.61201135:1(376-380)Online publication date: 11-Jan-2003
https://dl.acm.org/doi/10.1145/792548.612011
Sherstov AGrissom SKnox DJoyce DDann W(2003)Distributed visualization of graph algorithmsProceedings of the 34th SIGCSE technical symposium on Computer science education10.1145/611892.612011(376-380)Online publication date: 19-Feb-2003
https://dl.acm.org/doi/10.1145/611892.612011
Hoffman M(2004)An FPGA-based digital logic lab for computer organization and architectureJournal of Computing Sciences in Colleges10.5555/1060081.106010819:5(214-227)Online publication date: 1-May-2004
https://dl.acm.org/doi/10.5555/1060081.1060108

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