Article

Wireless interconnects for clock distribution

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K. O. KennethAuthors Info & Claims

TAU '02: Proceedings of the 8th ACM/IEEE international workshop on Timing issues in the specification and synthesis of digital systems

Pages 105 - 108

https://doi.org/10.1145/589411.589433

Published: 02 December 2002 Publication History

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Abstract

A wireless interconnect system for clock distribution which transmits and receives microwave signals across a chip using integrated antennas, receivers, and transmitters is presented. All of the com-ponents of the system are demonstrated at 15 GHz in a 0.18-m CMOS technology. Wireless interconnection is achieved over a distance of 5.6 mm.

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Yazdanpanah FAfsharmazayejani RAlaei MRezaei ADaneshtalab M(2019)An energy-efficient partition-based XYZ-planar routing algorithm for a wireless network-on-chipThe Journal of Supercomputing10.1007/s11227-018-2617-x75:2(837-861)Online publication date: 1-Feb-2019
https://dl.acm.org/doi/10.1007/s11227-018-2617-x
Honkote VTaskin B(2009)Zero clock skew synchronization with rotary clocking technologyProceedings of the 2009 10th International Symposium on Quality of Electronic Design10.1109/ISQED.2009.4810360(588-593)Online publication date: 16-Mar-2009
https://dl.acm.org/doi/10.1109/ISQED.2009.4810360
Taskin BWood JKourtev I(2006)Timing-Driven Physical Design for VLSI Circuits Using Resonant Rotary Clocking2006 49th IEEE International Midwest Symposium on Circuits and Systems10.1109/MWSCAS.2006.382047(261-265)Online publication date: Aug-2006
https://doi.org/10.1109/MWSCAS.2006.382047
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Wireless interconnects for clock distribution
1. Hardware

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Published In

TAU '02: Proceedings of the 8th ACM/IEEE international workshop on Timing issues in the specification and synthesis of digital systems

December 2002

156 pages

ISBN:1581135262

DOI:10.1145/589411

General Chair:
David P. LaPotin
IBM
,
Program Chairs:
Charles J. Alpert
IBM
,
John Lillis
UIC

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 02 December 2002

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TAU02

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TAU02: International Workshop on Timing Issues in the Specifications and Synthesis of Digital Systems

December 2 - 3, 2002

California, Monterey, USA

Acceptance Rates

TAU '02 Paper Acceptance Rate 19 of 42 submissions, 45%;

Overall Acceptance Rate 19 of 42 submissions, 45%

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Cited By

View all

Yazdanpanah FAfsharmazayejani RAlaei MRezaei ADaneshtalab M(2019)An energy-efficient partition-based XYZ-planar routing algorithm for a wireless network-on-chipThe Journal of Supercomputing10.1007/s11227-018-2617-x75:2(837-861)Online publication date: 1-Feb-2019
https://dl.acm.org/doi/10.1007/s11227-018-2617-x
Honkote VTaskin B(2009)Zero clock skew synchronization with rotary clocking technologyProceedings of the 2009 10th International Symposium on Quality of Electronic Design10.1109/ISQED.2009.4810360(588-593)Online publication date: 16-Mar-2009
https://dl.acm.org/doi/10.1109/ISQED.2009.4810360
Taskin BWood JKourtev I(2006)Timing-Driven Physical Design for VLSI Circuits Using Resonant Rotary Clocking2006 49th IEEE International Midwest Symposium on Circuits and Systems10.1109/MWSCAS.2006.382047(261-265)Online publication date: Aug-2006
https://doi.org/10.1109/MWSCAS.2006.382047
Tuffy FMcDaid LKwan VAlderman JMcGinnity TKelly PSantos J(2006)Inter-Neuron Communications for Large-Scale Neural Networks using Capacitive CouplingThe 2006 IEEE International Joint Conference on Neural Network Proceedings10.1109/IJCNN.2006.247184(2779-2784)Online publication date: 2006
https://doi.org/10.1109/IJCNN.2006.247184

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