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Exploiting data parallelism in signal processing on a dataflow machine

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P. NitezkiAuthors Info & Claims

ISCA '89: Proceedings of the 16th annual international symposium on Computer architecture

Pages 54 - 61

https://doi.org/10.1145/74925.74932

Published: 01 April 1989 Publication History

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Abstract

This paper will show that the massive data parallelism inherent to most signal processing tasks may be easily mapped onto the parallel structure of a data flow machine. A special system called STRUCTFLOW has been designed to optimize the static data flow model for hardware efficiency and low latency. The same abstractions from the general purpose data flow model that lead to a quasi systolic operation of the processing elements make explicit flow control of the data tokens as they pass through the arcs of the flow graph obsolete. We will describe the architecture of the system and discuss the restrictions on the structure of the flow graphs.

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Index Terms

Exploiting data parallelism in signal processing on a dataflow machine
1. Computer systems organization
  1. Architectures
    1. Other architectures
      1. Data flow architectures
2. Hardware
  1. Communication hardware, interfaces and storage
    1. Signal processing systems

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Reviews

Reviewer: David B. Skillicorn

One of the chronic problems of computer science is that researchers do not keep up with the literature. As a result, repetition is common. In this paper the author designs a stream-based dataflow language almost exactly like Lucid [1] (of which he appears unaware) and a static dataflow architecture almost exactly like Dennis's [2]. In order to allow fixed buffering between stages, only one set of stream elements is allowed into each part of the dataflow graph at a time. This effectively removes the opportunity for pipelining and its associated performance gains. Hence this architecture can be expected to perform quite poorly. A prototype processing element has been built, but the author essentially presents a paper design.

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Published In

ISCA '89: Proceedings of the 16th annual international symposium on Computer architecture

April 1989

426 pages

ISBN:0897913191

DOI:10.1145/74925

Chairman:
Jean-Claude Syre

ACM SIGARCH Computer Architecture News Volume 17, Issue 3
Special Issue: Proceedings of the 16th annual international symposium on Computer Architecture
June 1989
400 pages
ISSN:0163-5964
DOI:10.1145/74926
Editor:
Jean-Claude Syre
Issue’s Table of Contents

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 April 1989

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