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Data broadcasting in linearly scheduled array processors

Published: 01 January 1984 Publication History

Abstract

A major problem in executing algorithms in array processors is the implementation of broadcasts without unnecessary speed-up factor degradation. We discuss when and how broadcasts can be eliminated or reduced to easily implementable sequences of reduced local broadcasts. Algorithms are modelled as a structured set of indexed computations which operate on variables associated with a referencing or indexing function. The discussion is restricted to variables with linear indexing functions and to algorithms linearly scheduled for execution in array processors. Linear indexing functions are represented as affine matricial functions of the index set of the algorithm. The linear part of such representation is a coefficient matrix denoted the indexing matrix. Linear schedules are defined as linear time-space allocation functions mapping the computations of an algorithm into time and processors. We discuss necessary and sufficient conditions for the occurrence of broadcasts in a linearly scheduled algorithm. Necessary and sufficient conditions and constructive criteria are given for selecting linear schedules for which all broadcasts are eliminated or reduced to sequences of small local broadcasts.

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Published In

cover image ACM SIGARCH Computer Architecture News
ACM SIGARCH Computer Architecture News  Volume 12, Issue 3
June 1984
348 pages
ISSN:0163-5964
DOI:10.1145/773453
Issue’s Table of Contents
  • cover image ACM Conferences
    ISCA '84: Proceedings of the 11th annual international symposium on Computer architecture
    January 1984
    373 pages
    ISBN:0818605383
    DOI:10.1145/800015

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 January 1984
Published in SIGARCH Volume 12, Issue 3

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