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The Boolean Vector Machine [BVM]

Published: 13 June 1983 Publication History

Abstract

We describe the architecture of a class of machines intended to solve computationally intensive problems much faster than can today's machines, at no increase in cost.
We have investigated the programming of the BVM for several interesting algorithms on a BVM of 2k bit positions per register. More theoretical study of implementations of such highly parallel algorithms is motivated.

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cover image ACM Conferences
ISCA '83: Proceedings of the 10th annual international symposium on Computer architecture
June 1983
424 pages
  • cover image ACM SIGARCH Computer Architecture News
    ACM SIGARCH Computer Architecture News  Volume 11, Issue 3
    June 1983
    413 pages
    ISSN:0163-5964
    DOI:10.1145/1067651
    Issue’s Table of Contents

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Association for Computing Machinery

New York, NY, United States

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Published: 13 June 1983

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  • (1984)Combining speed with alpha-particle induced memory, error tolerance in a large boolean vector machineProceedings of the 11th annual international symposium on Computer architecture10.1145/800015.808192(251-253)Online publication date: 1-Jan-1984
  • (1984)Combining speed with alpha-particle induced memory, error tolerance in a large boolean vector machineACM SIGARCH Computer Architecture News10.1145/773453.80819212:3(251-253)Online publication date: 1-Jan-1984
  • (1987)Finding test-and-treatment procedures using parallel computationJournal of Parallel and Distributed Computing10.1016/0743-7315(87)90039-64:3(309-318)Online publication date: 1-Jun-1987

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