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CHIME: coupled hierarchical inductance model evaluation

Published: 07 June 2004 Publication History
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  • Abstract

    Modeling inductive effects accurately and efficiently is a critical necessity for design verification of high performance integrated systems. While several techniques have been suggested to address this problem, they are mostly based on sparsification schemes for the L or L-inverse matrix. In this paper, we introduce CHIME, a methodology for non-local inductance modeling and simulation. CHIME is based on a hierarchical model of inductance that accounts for all inductive couplings at a linear cost, without requiring any window size assumptions for sparsification. The efficacy of our approach stems from representing the mutual inductive couplings at various levels of hierarchy, rather than discarding some of them. A prototype implementation demonstrates orders of magnitude speedup over a full, flat model and significant accuracy improvements over a truncated model. Importantly, this hierarchical circuit simulation capability produces a solution that is as accurate as the hierarchically extracted circuits, thereby providing a "golden standard" against which simpler truncation based models can be validated.

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    Cited By

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    • (2022)Feasibility Study on Machine Learning-based Method for Determining Self-and Mutual Inductance2022 International Seminar on Intelligent Technology and Its Applications (ISITIA)10.1109/ISITIA56226.2022.9855321(193-198)Online publication date: 20-Jul-2022
    • (2012)Hybrid aggregated-vector algorithm for efficient parallelization of Fast Multipole Method2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems10.1109/EPEPS.2012.6457872(181-184)Online publication date: Oct-2012
    • (2004)Block partitioned Gauss-Seidel PEEC solver accelerated by QR-based coupling matrix compression techniquesElectrical Performance of Electronic Packaging10.1109/EPEP.2004.1407624(325-328)Online publication date: 2004

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    Published In

    cover image ACM Conferences
    DAC '04: Proceedings of the 41st annual Design Automation Conference
    June 2004
    1002 pages
    ISBN:1581138288
    DOI:10.1145/996566
    • General Chair:
    • Sharad Malik,
    • Program Chairs:
    • Limor Fix,
    • Andrew B. Kahng
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    New York, NY, United States

    Publication History

    Published: 07 June 2004

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    Author Tags

    1. circuit simulation
    2. inductance modeling

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    View all
    • (2022)Feasibility Study on Machine Learning-based Method for Determining Self-and Mutual Inductance2022 International Seminar on Intelligent Technology and Its Applications (ISITIA)10.1109/ISITIA56226.2022.9855321(193-198)Online publication date: 20-Jul-2022
    • (2012)Hybrid aggregated-vector algorithm for efficient parallelization of Fast Multipole Method2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems10.1109/EPEPS.2012.6457872(181-184)Online publication date: Oct-2012
    • (2004)Block partitioned Gauss-Seidel PEEC solver accelerated by QR-based coupling matrix compression techniquesElectrical Performance of Electronic Packaging10.1109/EPEP.2004.1407624(325-328)Online publication date: 2004

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