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vscode-pull-request-github Public
Forked from microsoft/vscode-pull-request-githubGitHub Pull Requests for Visual Studio Code
TypeScript MIT License UpdatedOct 3, 2024 -
ibex Public
Forked from lowRISC/ibexIbex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
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opencv_contrib Public
Forked from opencv/opencv_contribRepository for OpenCV's extra modules
C++ Apache License 2.0 UpdatedSep 18, 2024 -
opencv Public
Forked from opencv/opencvOpen Source Computer Vision Library
C++ Apache License 2.0 UpdatedSep 18, 2024 -
ultralytics-yolov8 Public
Forked from ultralytics/ultralyticsNEW - YOLOv8 🚀 in PyTorch > ONNX > OpenVINO > CoreML > TFLite
Python GNU Affero General Public License v3.0 UpdatedSep 17, 2024 -
IIC-OSIC-TOOLS Public
Forked from iic-jku/IIC-OSIC-TOOLSIIC-OSIC-TOOLS is an all-in-one Docker image for SKY130/GF180/IHP130-based analog and digital chip design. AMD64 and ARM64 are natively supported.
Python Apache License 2.0 UpdatedSep 17, 2024 -
MCUViewer Public
Forked from klonyyy/MCUViewerReal-time embedded variable & trace viewer
C GNU General Public License v3.0 UpdatedSep 16, 2024 -
phoeniX Public
Forked from phoeniX-Digital-Design/phoeniXphoeniX RISC-V Processor
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elements-nafarr Public
Forked from aesc-silicon/elements-nafarrOpen-Source IP Core Library
Scala MIT License UpdatedSep 4, 2024 -
GIMP-ML Public
Forked from kritiksoman/GIMP-MLAI for GNU Image Manipulation Program
Python MIT License UpdatedAug 31, 2024 -
priyanshu.github.io Public
Personal website
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tt05-spiking-neural-net Public
Forked from rejunity/tt05-spiking-neural-netVerilog Apache License 2.0 UpdatedAug 28, 2024 -
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RISC-V-Single-Cycle-Processor-Integrated-With-a-Cache-Memory-System-From-RTL-To-GDS Public
Forked from Youssefmdany/RISC-V-Single-Cycle-Processor-Integrated-With-a-Cache-Memory-System-From-RTL-To-GDSRISC-V Single-Cycle Processor Integrated With a Cache Memory System From RTL To GDS
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sanitizers Public
Forked from google/sanitizersAddressSanitizer, ThreadSanitizer, MemorySanitizer
C Other UpdatedAug 23, 2024 -
ChampSim-Branch-Predictor-simulator Public
Forked from ChampSim/ChampSimChampSim is an open-source trace based simulator maintained at Texas A&M University and through the support of the computer architecture community.
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yolov7 Public
Forked from WongKinYiu/yolov7Implementation of paper - YOLOv7: Trainable bag-of-freebies sets new state-of-the-art for real-time object detectors
Jupyter Notebook GNU General Public License v3.0 UpdatedAug 19, 2024 -
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verilator Public
Forked from sifferman/verilatorVerilator open-source SystemVerilog simulator and lint system
C++ GNU Lesser General Public License v3.0 UpdatedAug 16, 2024 -
training-fine-tuning-large-language-models-workshop-dhs2024 Public
Forked from dipanjanS/training-fine-tuning-large-language-models-workshop-dhs2024This repository will contain all the presentations, content, hands-on notebooks for a full day Generative AI workshop on Training, Fine-tuning Large Language Models for the DataHack Summit 2024 con…
Jupyter Notebook GNU General Public License v3.0 UpdatedAug 16, 2024 -
OpenROAD-flow-scripts Public
Forked from The-OpenROAD-Project/OpenROAD-flow-scriptsOpenROAD's scripts implementing an RTL-to-GDS Flow. Documentation at https://openroad-flow-scripts.readthedocs.io/en/latest/
Verilog Other UpdatedAug 16, 2024 -
ngc-learn Public
Forked from NACLab/ngc-learnNGC-Learn: Neurobiological Learning and Biomimetic Systems Simulation in Python
Python BSD 3-Clause "New" or "Revised" License UpdatedAug 15, 2024 -
cocotb Public
Forked from cocotb/cocotbcocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python
Python BSD 3-Clause "New" or "Revised" License UpdatedAug 15, 2024 -
OpenLane Public
Forked from The-OpenROAD-Project/OpenLaneOpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.
Python Apache License 2.0 UpdatedAug 15, 2024 -
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Neural-Networks-on-Silicon Public
Forked from fengbintu/Neural-Networks-on-SiliconThis is originally a collection of papers on neural network accelerators. Now it's more like my selection of research on deep learning and computer architecture.
UpdatedAug 11, 2024 -
Hazard3 Public
Forked from Wren6991/Hazard33-stage RV32IMACZb* processor with debug
Verilog Apache License 2.0 UpdatedAug 9, 2024