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@chipsalliance

CHIPS Alliance

Common Hardware for Interfaces, Processors and Systems

CHIPS Alliance Logo

🔗 chipsalliance.org | 📫 info@chipsalliance.org

The CHIPS Alliance develops high-quality, open source hardware designs and tools relevant to ASICs and FPGAs. By creating an open and collaborative environment, CHIPS Alliance shares resources to lower the cost of development. Companies and individuals can work together to develop open source CPUs, various peripherals, and complex IP blocks, as well as open source hardware or software tools to accelerate the creation of more efficient and innovative chip designs.


The CHIPS Alliance hosts multiple open source Projects, which are Workgroups.

Popular repositories Loading

  1. chisel chisel Public

    Chisel: A Modern Hardware Design Language

    Scala 4.2k 621

  2. rocket-chip rocket-chip Public

    Rocket Chip Generator

    Scala 3.4k 1.2k

  3. verible verible Public

    Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, formatter and language server

    C++ 1.5k 231

  4. riscv-dv riscv-dv Public

    Random instruction generator for RISC-V processor verification

    Python 1.1k 336

  5. Cores-VeeR-EH1 Cores-VeeR-EH1 Public

    VeeR EH1 core

    SystemVerilog 865 228

  6. firrtl firrtl Public archive

    Flexible Intermediate Representation for RTL

    Scala 740 180

Repositories

Showing 10 of 110 repositories
  • chisel Public

    Chisel: A Modern Hardware Design Language

    chipsalliance/chisel’s past year of commit activity
    Scala 4,228 Apache-2.0 621 329 (1 issue needs help) 159 Updated Apr 5, 2025
  • caliptra-ss Public

    HW Design Collateral for Caliptra Subsystem, which comprises Caliptra RoT IP and additional manufacturer controls.

    chipsalliance/caliptra-ss’s past year of commit activity
    SystemVerilog 14 Apache-2.0 9 49 11 Updated Apr 5, 2025
  • chipsalliance/chips-alliance-website’s past year of commit activity
    SCSS 4 MIT 5 8 8 Updated Apr 5, 2025
  • caliptra-mcu-sw Public

    Caliptra MCU Software

    chipsalliance/caliptra-mcu-sw’s past year of commit activity
    Rust 13 Apache-2.0 2 13 4 Updated Apr 5, 2025
  • adams-bridge Public

    Post-Quantum Cryptography IP Core (Crystals-Dilithium)

    chipsalliance/adams-bridge’s past year of commit activity
    SystemVerilog 21 Apache-2.0 5 18 3 Updated Apr 4, 2025
  • Caliptra Public

    Caliptra IP and firmware for integrated Root of Trust block

    chipsalliance/Caliptra’s past year of commit activity
    276 Apache-2.0 40 43 7 Updated Apr 4, 2025
  • sv-tests-results Public

    Output of the sv-tests runs.

    chipsalliance/sv-tests-results’s past year of commit activity
    HTML 6 3 0 0 Updated Apr 4, 2025
  • caliptra-sw Public

    Caliptra software (ROM, FMC, runtime firmware), and libraries/tools needed to build and test

    chipsalliance/caliptra-sw’s past year of commit activity
    Rust 109 Apache-2.0 53 130 57 Updated Apr 4, 2025
  • sv-tests Public

    Test suite designed to check compliance with the SystemVerilog standard.

    chipsalliance/sv-tests’s past year of commit activity
    SystemVerilog 311 ISC 78 47 (5 issues need help) 14 Updated Apr 4, 2025
  • t1 Public
    chipsalliance/t1’s past year of commit activity
    Scala 263 Apache-2.0 34 19 38 Updated Apr 4, 2025