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Formal verification of UML state machines with Promela and TLA+/PlusCal

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upml - formal verification of UML state machines with Promela and TLA+/PlusCal

A tool to convert (a subset of the whole spec of) a UML state machine/statechart into:

The state machine is described in a plantuml file (again, a subset of what plantuml offers) with some additions.

Status

Finite state machines (FSM) should be fully supported. Hierarchical state machines (HSM) are WIP.

Build

Depends on boost (spirit, program_options, filesystem). Requires C++20 or later.

upml documentation

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Formal verification of UML state machines with Promela and TLA+/PlusCal

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