DE1SOC DE10-NANO DE10-Standard OpenCL hardware that support VGA and desktop. And Some applications such as usb camera YUYV to RGB , Sobel and so on.
-
Updated
Nov 7, 2020 - Verilog
DE1SOC DE10-NANO DE10-Standard OpenCL hardware that support VGA and desktop. And Some applications such as usb camera YUYV to RGB , Sobel and so on.
Audio Signal Processing SoC
A neural network built in Verilog for the DE1-SoC FPGA board for handwritten digit recognition.
FPGA Verilog HDL design project (DE1-SoC)
Division Algorithms in FPGAs
Audio Signal Processing SoC Project Website
Implementation of Hopfield network using Verilog
A language learning solution to learn vocabulary from day-to-day objects with front-end on De1-SoC Cyclone V FPGA and backend on a Raspberry Pi, incorporating Microsoft Azure Cognitive Services
Response-Time Game written in VHDL. Supports cheat-prevention, pseudo-random delay, ws2812b response visualization and custom time-windows.
Game based on the Concentration Card Game coded in C. Connects to the DE1-SOC board for input. Output is on VGA
Add a description, image, and links to the de1-soc topic page so that developers can more easily learn about it.
To associate your repository with the de1-soc topic, visit your repo's landing page and select "manage topics."