A complete open-source design-for-testing (DFT) Solution

🕹 OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit

ACT hardware description language and core tools.

DATC RDF

Courseworks of CS6165 VLSI Physical Design Automation, NTHU.

Examples of the TCL Scripts for different purposes and for VLSI Physical Design are provided here for your reference

Simplify VLSI (timing, power, noise, correlation, reliability) modeling and analysis with Characterization Description Format

Converts GDSII (IC layout database) files to SVG (Vector graphics) files.

Course Project - Foundations of VLSI CAD - Autumn Semester 2022 - Indian Institute of Technology Bombay

Domain Specific Hardware Accelerators - VLSI CAD Project

grayscale conversion system and simple convolution system

A simple tool to demonstrate the physical design steps of VLSI Design Flow.

This repository contains python code snippets that implement several algorithms for automating the VLSI Physical Design process. This is based on the learnings from the course - EE5333W (Introduction to Physical Design Automation) at IITM.

Report of the contents learned in the 5-day workshop by VSD regarding the open-source EDA tools in the VLSI industry

A library for fast and optimized VLSI Computer-Aided-Design algorithms

🕹 OpenPARF-MLCAD2023: A Multi-Electrostatics Based FPGA Macro Placer Considering Cascaded Macros Groups and Fence Regions (MLCAD'23 Contest Submission)

Contains vim dotfiles configured for verilog, C++ & some stuff for VLSI

A binary decision diagram is a directed acyclic graph used to represent a Boolean function. The ROBDD is a canonical form, which means that given an identical ordering of input variables, equivalent Boolean functions will always reduce to the same ROBDD.

Heterogeneous Feature Extraction for Split Manufactured Layouts with Routing Perturbation

Course Assignment - Foundations of VLSI CAD - Autumn Semester 2022 - Indian Institute of Technology Bombay