TECHNICAL AREAS ____ Analog and Mixed-Signal Test: Michel Renovell, LIRMM; renovell@lirmm.fr CAE/... more TECHNICAL AREAS ____ Analog and Mixed-Signal Test: Michel Renovell, LIRMM; renovell@lirmm.fr CAE/CAD: Dwight Hill, Synopsys; hill@synopsys.com Configurable Computing: Fadi Kurdahi, University of California, Irvine; kurdahi@ece.uci.edu Deep-Submicron IC Design and Analysis: Sani Nassif, IBM; nassif@us.ibm.com Defect and Fault Tolerance: Michael Nicolaidis, iRoC Technologies; michael.nicolaidis@iroctech.com Defect-Based Test: Adit Singh, Auburn University, adsingh@eng.auburn.edu Design for Manufacturing, Yield, and ...
TECHNICAL AREAS ____ Analog and Mixed-Signal Test: Michel Renovell, LIRMM; renovell@lirmm.fr CAE/... more TECHNICAL AREAS ____ Analog and Mixed-Signal Test: Michel Renovell, LIRMM; renovell@lirmm.fr CAE/CAD: Dwight Hill, Synopsys; hill@synopsys.com Configurable Computing: Fadi Kurdahi, University of California, Irvine; kurdahi@ece.uci.edu Deep-Submicron IC Design and Analysis: Sani Nassif, IBM; nassif@us.ibm.com Defect and Fault Tolerance: Michael Nicolaidis, iRoC Technologies; michael.nicolaidis@iroctech.com Defect-Based Test: Adit Singh, Auburn University, adsingh@eng.auburn.edu Design for Manufacturing, Yield, and ...
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