Solar cells provide clean safe renewable energy. Pollution free and environment friendly photovol... more Solar cells provide clean safe renewable energy. Pollution free and environment friendly photovoltaic (PV) technologies are now generally identified as an alternative solution to many global-scale problems free such as energy demand, pollution, and environment safety. Our primary solution to this increasing electricity consumption has been to burn more fossil fuels (coal, oil, or natural gas) or build more nuclear plants. However, the greenhouse gasses produced by burning fossil fuels have been responsible for global warming, and safe disposal of high-level radioactive waste from nuclear plants raises several issues. Renewable energy is perceived as a sustainable solution to ensure future energy supply as well as being carbon dioxide emissions free or neutral. In this paper we compare different type of solar cell regarding construction and efficiency and processing cost.
An energy efficient modified architecture of 8-bit 100 kS/s SAR ADC for the biomedical implant pa... more An energy efficient modified architecture of 8-bit 100 kS/s SAR ADC for the biomedical implant pacemaker is presented in this paper. With the stringent need to prolong the battery life of portable battery operated biomedical implants such as pacemaker, an improved architecture of SAR ADC is proposed which ensures improved performance than other reported SAR ADC architectures. The ADC employed in the pacemaker drains huge amount of power from battery during the time of analog to digital signal conversion. The work presents ADC design which ensures the microwatt operation which in turn makes the pacemaker to run on small battery. The ADC is realized in 180 nm CMOS technology operated at 1.8 V. The power consumption and energy efficiency reported during simulation are 2.5 µW and 0.77 pJ/state having precision of 6.68 bits.
2015 International Conference on Green Computing and Internet of Things (ICGCIoT), 2015
In this paper, an efficient method of partial product reduction is analysed. there are a number o... more In this paper, an efficient method of partial product reduction is analysed. there are a number of techniques for partial product reduction it can be use of Wallace and Dadda schemes or can be use of compressor. Here we have studied a number of techniques for partial product reduction and came to a conclusion that compressors are better among them and we have inserted a concept of sleep transistor in order to further improve their designing. Compressor is an important part of multiplier as the maximum space in multiplication process is taken by partial products these are used to reduce the space equipped by partial products. The compressor architecture given in this paper are designed using three-level MCML gates, which are required one for improvement in speed, power consumption and area. Another concept of sleep transistor is combined with this compressor which is useful in reducing the leakage current. Designing is done in a 16nm TSMH CMOS technology using Tanner EDA 14.1 v tool.
2014 International Conference on Computational Intelligence and Communication Networks, 2014
The effect on transistors when maximum collector-emitter voltage under condition base is open (vc... more The effect on transistors when maximum collector-emitter voltage under condition base is open (vceo), maximum collector-base voltage under condition emitter is open (vcbo), maximum collector-emitter voltage under condition base is shortened (vces) and maximum collector-base voltage under condition emitter is shortened (vcbs) ratings are got exceeded in two circuits are studied by visual analysis, x-ray examination, electrical examination and microscopic examination. This study helps in increasing the reliability of transistor used in all modern electronic equipments. We have proposed here for the implementation of snubber circuit to reduce the problem mentioned above. The results of visual analysis, electrical examination and microscopic examinations is shown in the form of pictures. Our proposal can be implemented in many house appliances, as common people are generally not aware of this fact of transistor ratings so the accidents due to unawareness can be prevented.
To meet the requirements of a smart city in supporting a sustainable high-quality lifestyle for p... more To meet the requirements of a smart city in supporting a sustainable high-quality lifestyle for people, there is a need of a lot of smart technologies & a smart city needs a smart grid. Smart grid is an integration of electrical and digital technologies, information and communication. It delivers electrical power to the customers using two-way digital technologies and also monitors the supply to the customers and measurements. Existing grid has he limited delivery system and a high cost of a power outage and power quality interruption and the communications of the grid are too slow.
As we know that frequency, voltage and load capacitance plays vital role in power dissipation in ... more As we know that frequency, voltage and load capacitance plays vital role in power dissipation in VLSI circuits for achieving low power VLSI circuit we can scale any of these factors. This paper investigates the effect of supply and threshold voltages and frequency at which the VLSI chip is operated and the desired techniques for lowering the voltage and frequencies to obtain the low power consumed VLSI system. Some special techniques which can reduce the clock frequency like pipelining and parallel processing strategies for desirable propagation delays are explained in brief in this paper. By achieving low power we can fulfil needs for successful design i.e. less power, less area, less delay. 1.
Proceedings of the International Congress on Information and Communication Technology, 2016
The physical process by which the energy is gathered from the surrounding environment is called e... more The physical process by which the energy is gathered from the surrounding environment is called energy harvesting. For several micro-scale electronic systems, electrical energy harvested from the sunlight proves to be an attractive and feasible solution. The paper presents the energy efficient design of OPAMP which is in conjunction with the one of the most important integral component of electrical interface known as rectifier, an AC–DC converter. A high gain OPAMP is proposed to harvest the maximum electrical energy obtained from the AC–DC energy converter, since the electrical signal obtained lies within few millivolts as a result it needs the amplification to provide startup voltage for the high end electronic applications. In this work a detailed analysis has been done between two designs of OPAMP one is high gain OPAMP design and other is design of OPAMP with current buffer compensation technique targeted to maximize the power extraction from the converters. Both the designs are implemented in 180 nm technology, whereas high gain design OPAMP operates at 1.2 V and another design of OPAMP operates at 1.8 V. The gain reported by the high gain OPAMP design is 95.41 dB with the power efficiency of 188 nW and current buffer compensation technique OPAMP is 90.71 dB with the power efficiency of 244 nW.
Journal of emerging technologies and innovative research, 2018
Solar energy is a “green source of energy” can be harnessed from the power and heat of the sun’s ... more Solar energy is a “green source of energy” can be harnessed from the power and heat of the sun’s rays. Solar energy is being recognized as the future of alternative energy sources as it is non-polluting that helps to combat the Greenhouse effect on global climate created by use of fossils fuels. Solar power is anticipated to become the world's largest source of electricity by 2050. It is being researched and concluded that solar photovoltaic’s and concentrated solar power contributing 16 and 11 percent to the global overall consumption, respectively. In 2016, after another year of rapid growth, solar generated 1.3% of global power. The future scope and research lies in harnessing the solar energy through the solar panels; that could be organic or photovoltaic cell. But the efficiency of the system of harnessing the energy matters in the whole scenario, i.e. how could the efficiency be optimized by regulating the factors affecting the losses and hence emphasizing over the remedie...
Learning and Analytics in Intelligent Systems, 2019
Researchers present noise suppression model for reducing the spectral effects of acoustically add... more Researchers present noise suppression model for reducing the spectral effects of acoustically added noise in speech. Background noise which is acoustically added to speech may decrease the performance of digital voice processors that are used for applications such as speech compression, recognition, and authentication. [6, 7] In proposed paper different types of Short Time Spectral Amplitude (STSA) [1, 17] based methods are explained to decrease the noise. Spectral subtraction gives a computationally efficient, processor- independent approach to effective digital speech analysis. But as a result of artifact, another synthetic noise may be produced by algorithm that is called musical noise. In spectral subtraction methods, there is shown less trade-off between residual and musical noise so the quality and intelligibility of signal is not maximized at required level. [8] To overcome from the problem of musical noise, wiener filter and statistical based model methods are discovered and some proposed modifications [7, 8, 9, 10, 11] are suggested in every methods to make it more effective.
Journal of emerging technologies and innovative research, 2018
A barrel shifter is a circuit that can shift a data word by a specified number of bits without th... more A barrel shifter is a circuit that can shift a data word by a specified number of bits without the use of any sequential logic, only pure combinatorial logic. The main concern of this paper is to design and study about barrel shifter of 8-bit that is used in RISC processor using GDI (Gate-Diffusion-Input) technique. The main objective of this paper is to design a fully custom 8 bit barrel shifter using 8x1 multiplexer with the help of GDI technique and analyze the performance on basis of power consumption and number of transistors. The tool used to fulfill the purpose is Tanner EDA15.1 using 180nm technology.
Full adders are the building blocks of nearly all the VLSI applications—be it digital signal proc... more Full adders are the building blocks of nearly all the VLSI applications—be it digital signal processing or image and video processing. In this paper, an 8-bit Carry Look-ahead Adder is implemented and compared using two different types of designs—a conventional Complementary Metal-Oxide Semiconductor (CMOS) logic and an Efficient Charge Recovery Logic (ECRL). These adders are designed and simulated using Tanner Tools v15.23 with 180 nm technology. Performance parameters like power consumption and propagation delay are compared by varying input supply and operating frequency for the two different circuits. The comparison shows that an 8-bit CLA design using ECRL Adiabatic logic is better than an 8-bit CLA design using CMOS logic in terms of power consumption, transistor count, and power delay product (PDP).
Journal of emerging technologies and innovative research, 2018
This paper presents design of a 10 segmentantenna for ultra-wideband (UWB) applications.It shows ... more This paper presents design of a 10 segmentantenna for ultra-wideband (UWB) applications.It shows good bandwidth of 6.66GHz ranging from 3.85GHz to 10.14GHz .Here a partial ground technique is adopted with a 10 segmentpatch antenna structure. Various parameters including gain, VSWR, directivity and efficiency are shown. These results show that the design can be suitable for different applications with high accuracy, accurate VSWR and less losses.CST Microwave Studio software is used to perform simulations of patch antenna.Also this antenna shows good radiation characteristics and results a desired gain across the band, which makes the antenna a perfect choice for UWB applications. Simulated parameters indicate that the proposed antenna exhibits good linearly polarized radiation pattern. IndexTerms–Ultra Wide Band (UWB), Partial Ground, 10 segment, Voltage Standing Wave Ratio (VSWR) ________________________________________________________________________________________________________
This paper aims at understanding the existing deep sub-micron and sub-micron implementation of a ... more This paper aims at understanding the existing deep sub-micron and sub-micron implementation of a digital design, analyzing it in terms of power, area and performance (timing) and to come up with solutions and strategies to optimize the design in terms of power, area and timing. An effort was made to comprehend the constraints, causes and the requirements that may result in the existing implementation of the design. Also, various experiments were carried out to enhance the design in various aspects like power, area and timing. Benefits of experiments and tradeoffs required were comparatively analyzed. An effort was made to experiment for optimum solutions and strategies to balance the requirements. The key areas stressed upon in this paper are the 28-nm technologies which pose some unique challenges, such as Low-Power Design, Restricted Design Rules, and Design for Yield. Several design examples have been presented, highlighting key techniques employed in the Synopsys® IC Compiler. K...
In this paper ,we are introducing a technique mainly improving cell-edge throughput by coordinati... more In this paper ,we are introducing a technique mainly improving cell-edge throughput by coordinating scheduling and signal transmission of multiple BSs. Different from joint transmission (JT), in which the desired signals for a user equipment (UE) are simultaneously transmitted from multiple BSs. In this paper, we use the collaborative MIMO method to implement our idea of cell edge user throughput improvement. Emerging broadband wireless systems, such as those based on IEEE 802.16 m or 3GPP LTE-A, will re-use spectrum in every sector and maximize system spectrum efficiency. In so doing, the spectrum efficiency for cell-edge users is very poor in comparison with the system-wide average, and nomadic users located near the cell edge experience very low throughput. Co-MIMO has the advantages of ICI mitigation and spectral efficiency improvement. Moreover, it provides an acceptable tradeoff between the performance gain and the stringent requirement on the backbone traffic and computationa...
This paper presents the design of UWB Antenna that are for two different frequencies,3.32GHz and ... more This paper presents the design of UWB Antenna that are for two different frequencies,3.32GHz and 4.52GHz and with a return loss of -41.37dB and -26.82dB respectively. It shows good bandwidth of 2.55GHz ranging from 2.66GHz to 5.21GHz .Here a partial ground technique is adopted with a pentagonal patch antenna structure. Various parameters including gain, E-field, H-field, directivity and efficiency are shown. These results show that the design can be suitable for different applications with high accuracy and less losses.CST Microwave Studio software is used to perform simulations. This antenna also shows good radiation characteristics and obtains a desired gain across the band, which makes the antenna a perfect choice for UWB applications. Simulated parameters indicate that the proposed antenna exhibits good linearly polarized radiation pattern.
In this work, the performance of shift registers is improved using pulsed latch technique. In hig... more In this work, the performance of shift registers is improved using pulsed latch technique. In high speed and low power VLSI applications where heavy pipelining is required, low power edge triggered flip flops are used. The replacement o flip flop with pulsed latch has shown great success in low power VLSI applications. The proposed circuit has been designed using Tanner Tools v 14.1 in CMOS technology. The pulse latch technique reduces the power consumption significantly in the designed circuit and there is also an improvement in power delay product. The proposed circuit also require less number of transistors for its implementation as compared to conventional version.
Studies in Autonomic, Data-driven and Industrial Computing, 2021
In this paper, we present the architecture of the current reuse technique-based inverter stacked-... more In this paper, we present the architecture of the current reuse technique-based inverter stacked-4 amplifier which provide low power consumption and low noise, so as to be used as an analog front end instrumentation cardiac amplifier which decide the overall efficiency of ECG recording system as well as the performance of current reuse technique-based inverter stacked-4 amplifier is also compared with the existing architecture of stacked 2 and stacked 3 amplifier. Based on the comparison result we can conclude that the presented low power architecture of stacked-4 amplifier can be used to gather sensory signal from sensor nodes (electrodes) in IOT-based ECG application. As sensor nodes are generally operated by battery so, the key challenge in the design of IOT-based application is low power consumption.
Solar cells provide clean safe renewable energy. Pollution free and environment friendly photovol... more Solar cells provide clean safe renewable energy. Pollution free and environment friendly photovoltaic (PV) technologies are now generally identified as an alternative solution to many global-scale problems free such as energy demand, pollution, and environment safety. Our primary solution to this increasing electricity consumption has been to burn more fossil fuels (coal, oil, or natural gas) or build more nuclear plants. However, the greenhouse gasses produced by burning fossil fuels have been responsible for global warming, and safe disposal of high-level radioactive waste from nuclear plants raises several issues. Renewable energy is perceived as a sustainable solution to ensure future energy supply as well as being carbon dioxide emissions free or neutral. In this paper we compare different type of solar cell regarding construction and efficiency and processing cost.
An energy efficient modified architecture of 8-bit 100 kS/s SAR ADC for the biomedical implant pa... more An energy efficient modified architecture of 8-bit 100 kS/s SAR ADC for the biomedical implant pacemaker is presented in this paper. With the stringent need to prolong the battery life of portable battery operated biomedical implants such as pacemaker, an improved architecture of SAR ADC is proposed which ensures improved performance than other reported SAR ADC architectures. The ADC employed in the pacemaker drains huge amount of power from battery during the time of analog to digital signal conversion. The work presents ADC design which ensures the microwatt operation which in turn makes the pacemaker to run on small battery. The ADC is realized in 180 nm CMOS technology operated at 1.8 V. The power consumption and energy efficiency reported during simulation are 2.5 µW and 0.77 pJ/state having precision of 6.68 bits.
2015 International Conference on Green Computing and Internet of Things (ICGCIoT), 2015
In this paper, an efficient method of partial product reduction is analysed. there are a number o... more In this paper, an efficient method of partial product reduction is analysed. there are a number of techniques for partial product reduction it can be use of Wallace and Dadda schemes or can be use of compressor. Here we have studied a number of techniques for partial product reduction and came to a conclusion that compressors are better among them and we have inserted a concept of sleep transistor in order to further improve their designing. Compressor is an important part of multiplier as the maximum space in multiplication process is taken by partial products these are used to reduce the space equipped by partial products. The compressor architecture given in this paper are designed using three-level MCML gates, which are required one for improvement in speed, power consumption and area. Another concept of sleep transistor is combined with this compressor which is useful in reducing the leakage current. Designing is done in a 16nm TSMH CMOS technology using Tanner EDA 14.1 v tool.
2014 International Conference on Computational Intelligence and Communication Networks, 2014
The effect on transistors when maximum collector-emitter voltage under condition base is open (vc... more The effect on transistors when maximum collector-emitter voltage under condition base is open (vceo), maximum collector-base voltage under condition emitter is open (vcbo), maximum collector-emitter voltage under condition base is shortened (vces) and maximum collector-base voltage under condition emitter is shortened (vcbs) ratings are got exceeded in two circuits are studied by visual analysis, x-ray examination, electrical examination and microscopic examination. This study helps in increasing the reliability of transistor used in all modern electronic equipments. We have proposed here for the implementation of snubber circuit to reduce the problem mentioned above. The results of visual analysis, electrical examination and microscopic examinations is shown in the form of pictures. Our proposal can be implemented in many house appliances, as common people are generally not aware of this fact of transistor ratings so the accidents due to unawareness can be prevented.
To meet the requirements of a smart city in supporting a sustainable high-quality lifestyle for p... more To meet the requirements of a smart city in supporting a sustainable high-quality lifestyle for people, there is a need of a lot of smart technologies & a smart city needs a smart grid. Smart grid is an integration of electrical and digital technologies, information and communication. It delivers electrical power to the customers using two-way digital technologies and also monitors the supply to the customers and measurements. Existing grid has he limited delivery system and a high cost of a power outage and power quality interruption and the communications of the grid are too slow.
As we know that frequency, voltage and load capacitance plays vital role in power dissipation in ... more As we know that frequency, voltage and load capacitance plays vital role in power dissipation in VLSI circuits for achieving low power VLSI circuit we can scale any of these factors. This paper investigates the effect of supply and threshold voltages and frequency at which the VLSI chip is operated and the desired techniques for lowering the voltage and frequencies to obtain the low power consumed VLSI system. Some special techniques which can reduce the clock frequency like pipelining and parallel processing strategies for desirable propagation delays are explained in brief in this paper. By achieving low power we can fulfil needs for successful design i.e. less power, less area, less delay. 1.
Proceedings of the International Congress on Information and Communication Technology, 2016
The physical process by which the energy is gathered from the surrounding environment is called e... more The physical process by which the energy is gathered from the surrounding environment is called energy harvesting. For several micro-scale electronic systems, electrical energy harvested from the sunlight proves to be an attractive and feasible solution. The paper presents the energy efficient design of OPAMP which is in conjunction with the one of the most important integral component of electrical interface known as rectifier, an AC–DC converter. A high gain OPAMP is proposed to harvest the maximum electrical energy obtained from the AC–DC energy converter, since the electrical signal obtained lies within few millivolts as a result it needs the amplification to provide startup voltage for the high end electronic applications. In this work a detailed analysis has been done between two designs of OPAMP one is high gain OPAMP design and other is design of OPAMP with current buffer compensation technique targeted to maximize the power extraction from the converters. Both the designs are implemented in 180 nm technology, whereas high gain design OPAMP operates at 1.2 V and another design of OPAMP operates at 1.8 V. The gain reported by the high gain OPAMP design is 95.41 dB with the power efficiency of 188 nW and current buffer compensation technique OPAMP is 90.71 dB with the power efficiency of 244 nW.
Journal of emerging technologies and innovative research, 2018
Solar energy is a “green source of energy” can be harnessed from the power and heat of the sun’s ... more Solar energy is a “green source of energy” can be harnessed from the power and heat of the sun’s rays. Solar energy is being recognized as the future of alternative energy sources as it is non-polluting that helps to combat the Greenhouse effect on global climate created by use of fossils fuels. Solar power is anticipated to become the world's largest source of electricity by 2050. It is being researched and concluded that solar photovoltaic’s and concentrated solar power contributing 16 and 11 percent to the global overall consumption, respectively. In 2016, after another year of rapid growth, solar generated 1.3% of global power. The future scope and research lies in harnessing the solar energy through the solar panels; that could be organic or photovoltaic cell. But the efficiency of the system of harnessing the energy matters in the whole scenario, i.e. how could the efficiency be optimized by regulating the factors affecting the losses and hence emphasizing over the remedie...
Learning and Analytics in Intelligent Systems, 2019
Researchers present noise suppression model for reducing the spectral effects of acoustically add... more Researchers present noise suppression model for reducing the spectral effects of acoustically added noise in speech. Background noise which is acoustically added to speech may decrease the performance of digital voice processors that are used for applications such as speech compression, recognition, and authentication. [6, 7] In proposed paper different types of Short Time Spectral Amplitude (STSA) [1, 17] based methods are explained to decrease the noise. Spectral subtraction gives a computationally efficient, processor- independent approach to effective digital speech analysis. But as a result of artifact, another synthetic noise may be produced by algorithm that is called musical noise. In spectral subtraction methods, there is shown less trade-off between residual and musical noise so the quality and intelligibility of signal is not maximized at required level. [8] To overcome from the problem of musical noise, wiener filter and statistical based model methods are discovered and some proposed modifications [7, 8, 9, 10, 11] are suggested in every methods to make it more effective.
Journal of emerging technologies and innovative research, 2018
A barrel shifter is a circuit that can shift a data word by a specified number of bits without th... more A barrel shifter is a circuit that can shift a data word by a specified number of bits without the use of any sequential logic, only pure combinatorial logic. The main concern of this paper is to design and study about barrel shifter of 8-bit that is used in RISC processor using GDI (Gate-Diffusion-Input) technique. The main objective of this paper is to design a fully custom 8 bit barrel shifter using 8x1 multiplexer with the help of GDI technique and analyze the performance on basis of power consumption and number of transistors. The tool used to fulfill the purpose is Tanner EDA15.1 using 180nm technology.
Full adders are the building blocks of nearly all the VLSI applications—be it digital signal proc... more Full adders are the building blocks of nearly all the VLSI applications—be it digital signal processing or image and video processing. In this paper, an 8-bit Carry Look-ahead Adder is implemented and compared using two different types of designs—a conventional Complementary Metal-Oxide Semiconductor (CMOS) logic and an Efficient Charge Recovery Logic (ECRL). These adders are designed and simulated using Tanner Tools v15.23 with 180 nm technology. Performance parameters like power consumption and propagation delay are compared by varying input supply and operating frequency for the two different circuits. The comparison shows that an 8-bit CLA design using ECRL Adiabatic logic is better than an 8-bit CLA design using CMOS logic in terms of power consumption, transistor count, and power delay product (PDP).
Journal of emerging technologies and innovative research, 2018
This paper presents design of a 10 segmentantenna for ultra-wideband (UWB) applications.It shows ... more This paper presents design of a 10 segmentantenna for ultra-wideband (UWB) applications.It shows good bandwidth of 6.66GHz ranging from 3.85GHz to 10.14GHz .Here a partial ground technique is adopted with a 10 segmentpatch antenna structure. Various parameters including gain, VSWR, directivity and efficiency are shown. These results show that the design can be suitable for different applications with high accuracy, accurate VSWR and less losses.CST Microwave Studio software is used to perform simulations of patch antenna.Also this antenna shows good radiation characteristics and results a desired gain across the band, which makes the antenna a perfect choice for UWB applications. Simulated parameters indicate that the proposed antenna exhibits good linearly polarized radiation pattern. IndexTerms–Ultra Wide Band (UWB), Partial Ground, 10 segment, Voltage Standing Wave Ratio (VSWR) ________________________________________________________________________________________________________
This paper aims at understanding the existing deep sub-micron and sub-micron implementation of a ... more This paper aims at understanding the existing deep sub-micron and sub-micron implementation of a digital design, analyzing it in terms of power, area and performance (timing) and to come up with solutions and strategies to optimize the design in terms of power, area and timing. An effort was made to comprehend the constraints, causes and the requirements that may result in the existing implementation of the design. Also, various experiments were carried out to enhance the design in various aspects like power, area and timing. Benefits of experiments and tradeoffs required were comparatively analyzed. An effort was made to experiment for optimum solutions and strategies to balance the requirements. The key areas stressed upon in this paper are the 28-nm technologies which pose some unique challenges, such as Low-Power Design, Restricted Design Rules, and Design for Yield. Several design examples have been presented, highlighting key techniques employed in the Synopsys® IC Compiler. K...
In this paper ,we are introducing a technique mainly improving cell-edge throughput by coordinati... more In this paper ,we are introducing a technique mainly improving cell-edge throughput by coordinating scheduling and signal transmission of multiple BSs. Different from joint transmission (JT), in which the desired signals for a user equipment (UE) are simultaneously transmitted from multiple BSs. In this paper, we use the collaborative MIMO method to implement our idea of cell edge user throughput improvement. Emerging broadband wireless systems, such as those based on IEEE 802.16 m or 3GPP LTE-A, will re-use spectrum in every sector and maximize system spectrum efficiency. In so doing, the spectrum efficiency for cell-edge users is very poor in comparison with the system-wide average, and nomadic users located near the cell edge experience very low throughput. Co-MIMO has the advantages of ICI mitigation and spectral efficiency improvement. Moreover, it provides an acceptable tradeoff between the performance gain and the stringent requirement on the backbone traffic and computationa...
This paper presents the design of UWB Antenna that are for two different frequencies,3.32GHz and ... more This paper presents the design of UWB Antenna that are for two different frequencies,3.32GHz and 4.52GHz and with a return loss of -41.37dB and -26.82dB respectively. It shows good bandwidth of 2.55GHz ranging from 2.66GHz to 5.21GHz .Here a partial ground technique is adopted with a pentagonal patch antenna structure. Various parameters including gain, E-field, H-field, directivity and efficiency are shown. These results show that the design can be suitable for different applications with high accuracy and less losses.CST Microwave Studio software is used to perform simulations. This antenna also shows good radiation characteristics and obtains a desired gain across the band, which makes the antenna a perfect choice for UWB applications. Simulated parameters indicate that the proposed antenna exhibits good linearly polarized radiation pattern.
In this work, the performance of shift registers is improved using pulsed latch technique. In hig... more In this work, the performance of shift registers is improved using pulsed latch technique. In high speed and low power VLSI applications where heavy pipelining is required, low power edge triggered flip flops are used. The replacement o flip flop with pulsed latch has shown great success in low power VLSI applications. The proposed circuit has been designed using Tanner Tools v 14.1 in CMOS technology. The pulse latch technique reduces the power consumption significantly in the designed circuit and there is also an improvement in power delay product. The proposed circuit also require less number of transistors for its implementation as compared to conventional version.
Studies in Autonomic, Data-driven and Industrial Computing, 2021
In this paper, we present the architecture of the current reuse technique-based inverter stacked-... more In this paper, we present the architecture of the current reuse technique-based inverter stacked-4 amplifier which provide low power consumption and low noise, so as to be used as an analog front end instrumentation cardiac amplifier which decide the overall efficiency of ECG recording system as well as the performance of current reuse technique-based inverter stacked-4 amplifier is also compared with the existing architecture of stacked 2 and stacked 3 amplifier. Based on the comparison result we can conclude that the presented low power architecture of stacked-4 amplifier can be used to gather sensory signal from sensor nodes (electrodes) in IOT-based ECG application. As sensor nodes are generally operated by battery so, the key challenge in the design of IOT-based application is low power consumption.
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