Abstract- This paper presents a voltage based CMOS winner-take-all (WTA) circuit for analog volta... more Abstract- This paper presents a voltage based CMOS winner-take-all (WTA) circuit for analog voltage signals. The WTA circuit is based on a winner follower and wide-range transconductance amplifiers. The voltage based design uses capacitive storage for low power consumption. The circuit is modularized and its layout size is a linear function of the number of inputs. This makes the circuit easy to be implemented in VLSI circuit. The circuit’s processing speed is accelerated by wide-range transconductance amplifiers which offer an extraordinary signal gain. Power consumption is reduced by shutting the transconductance amplifiers off after the competition is completed, while the processing results are stored in the capacitors of the WTA circuit. Schematic organization of this WTA circuit and computer simulation results are
A designated contact person Prof. Janusz Starzyk telephone number 740-593-1580 fax number 740-593... more A designated contact person Prof. Janusz Starzyk telephone number 740-593-1580 fax number 740-593-0007 email address starzyk@bobcat.ent.ohiou.edu A designated presenter Janusz Starzyk ... A list of topic numbers : T1.1 Electrical-level circuit and timing simulation M1.2 ...
Page 1. A SWITCHED-CAPACITOR ANALYSIS METAL-OXIDE-SILICON CIRCUIT SIMULATOR A Dissertation Presen... more Page 1. A SWITCHED-CAPACITOR ANALYSIS METAL-OXIDE-SILICON CIRCUIT SIMULATOR A Dissertation Presented to The Faculty of the Fritz J. and Dolores H. Russ College of Engineering and Technology Ohio University In partial Fulfillment ...
Abstract The authors present a method of measuring the degree of similarity of handwritten charac... more Abstract The authors present a method of measuring the degree of similarity of handwritten characters. This method is based on the segments of handwritten characters. Each handwritten image is decomposed into several segments. Then they compare the ...
This paper presents a voltage based CMOS winner-take-all (WTA) circuit for analog voltage signals... more This paper presents a voltage based CMOS winner-take-all (WTA) circuit for analog voltage signals. The WTA circuit is based on a winner follower and wide-range transconductance amplifiers. The voltage based design uses capacitive storage for low power consumption. The circuit is modularized and its layout size is a linear function of the number of inputs. This makes the circuit easy to be implemented in VLSI circuit. The circuit's processing speed is accelerated by wide-range transconductance amplifiers which offer an extraordinary signal gain. Power consumption is reduced by shutting the transconductance amplifiers off after the competition is completed, while the processing results are stored in the capacitors of the WTA circuit. Schematic organization of this WTA circuit and computer simulation results are also presented.
A new organization of switched capacitor charge pump circuits based on voltage doubler structures... more A new organization of switched capacitor charge pump circuits based on voltage doubler structures is presented in this paper. Each voltage doubler takes a DC input and outputs a doubled DC voltage. By cascading n voltage doublers the output voltage increases up to 2 times. A two phase and a multiphase voltage doubler structures are proposed and their properties discussed. The multiphase voltage charge pump is a minimum capacitance realization of the switched-capacitor based voltage multiplier. A simulator working in the Q-V realm was used for simplified circuit level simulation and to estimate the number of required clock cycles to pump the output to a desired voltage. In order to evaluate the power delivered by a charge pump, a resistive load is attached to the output of the charge pump and an equivalent capacitance is evaluated. Power analysis is performed using an equivalent R-C circuit. A comparison of the proposed circuits with Dickson charge pump and Makowski’s voltage multipl...
... Segmentation and clustering in neural networks for image recognition. Jan, Ying-Wei. Display ... more ... Segmentation and clustering in neural networks for image recognition. Jan, Ying-Wei. Display Full Text | Download Full Text 2.55 MB PDF file. Degree Master of Science (MS), Ohio University, Electrical Engineering (Engineering), 1994. ...
This paper presents a simulation technique and a computer program for fast DC analysis of MOS tra... more This paper presents a simulation technique and a computer program for fast DC analysis of MOS transistor based VLSI circuits. Time domain analysis of a VLSI circuit is evaluated by a piecewise constant waveform approximation. This approximation is realized by repeatedly applying the developed DC analysis engine with initial conditions. All proposed methods such as device modeling, circuit partitioning and event-driven simulation were implemented and combined with such well known algorithms as modified nodal analysis (MNA), Katzenelson algorithm and Gaussian elimination in the form of a circuit simulation program: SAMOC. Time domain waveforms and benchmark circuit simulation results comparison of SPICE and SAMOC are presented
Proceedings of the 39th Midwest Symposium on Circuits and Systems, 1996
A VOLTAGE BASED WINNER TAKES A.LL CIRCUIT ... JANUS2 A. STARZYK AND YING-WE1 JAN School of Electr... more A VOLTAGE BASED WINNER TAKES A.LL CIRCUIT ... JANUS2 A. STARZYK AND YING-WE1 JAN School of Electrical Engineering and Computer Science Ohio University, Athens OH 45701 ... Absrract: Winner-take-all (WTA) is a usually used operation in neural network to locate ...
Abstract- This paper presents a voltage based CMOS winner-take-all (WTA) circuit for analog volta... more Abstract- This paper presents a voltage based CMOS winner-take-all (WTA) circuit for analog voltage signals. The WTA circuit is based on a winner follower and wide-range transconductance amplifiers. The voltage based design uses capacitive storage for low power consumption. The circuit is modularized and its layout size is a linear function of the number of inputs. This makes the circuit easy to be implemented in VLSI circuit. The circuit’s processing speed is accelerated by wide-range transconductance amplifiers which offer an extraordinary signal gain. Power consumption is reduced by shutting the transconductance amplifiers off after the competition is completed, while the processing results are stored in the capacitors of the WTA circuit. Schematic organization of this WTA circuit and computer simulation results are
A designated contact person Prof. Janusz Starzyk telephone number 740-593-1580 fax number 740-593... more A designated contact person Prof. Janusz Starzyk telephone number 740-593-1580 fax number 740-593-0007 email address starzyk@bobcat.ent.ohiou.edu A designated presenter Janusz Starzyk ... A list of topic numbers : T1.1 Electrical-level circuit and timing simulation M1.2 ...
Page 1. A SWITCHED-CAPACITOR ANALYSIS METAL-OXIDE-SILICON CIRCUIT SIMULATOR A Dissertation Presen... more Page 1. A SWITCHED-CAPACITOR ANALYSIS METAL-OXIDE-SILICON CIRCUIT SIMULATOR A Dissertation Presented to The Faculty of the Fritz J. and Dolores H. Russ College of Engineering and Technology Ohio University In partial Fulfillment ...
Abstract The authors present a method of measuring the degree of similarity of handwritten charac... more Abstract The authors present a method of measuring the degree of similarity of handwritten characters. This method is based on the segments of handwritten characters. Each handwritten image is decomposed into several segments. Then they compare the ...
This paper presents a voltage based CMOS winner-take-all (WTA) circuit for analog voltage signals... more This paper presents a voltage based CMOS winner-take-all (WTA) circuit for analog voltage signals. The WTA circuit is based on a winner follower and wide-range transconductance amplifiers. The voltage based design uses capacitive storage for low power consumption. The circuit is modularized and its layout size is a linear function of the number of inputs. This makes the circuit easy to be implemented in VLSI circuit. The circuit's processing speed is accelerated by wide-range transconductance amplifiers which offer an extraordinary signal gain. Power consumption is reduced by shutting the transconductance amplifiers off after the competition is completed, while the processing results are stored in the capacitors of the WTA circuit. Schematic organization of this WTA circuit and computer simulation results are also presented.
A new organization of switched capacitor charge pump circuits based on voltage doubler structures... more A new organization of switched capacitor charge pump circuits based on voltage doubler structures is presented in this paper. Each voltage doubler takes a DC input and outputs a doubled DC voltage. By cascading n voltage doublers the output voltage increases up to 2 times. A two phase and a multiphase voltage doubler structures are proposed and their properties discussed. The multiphase voltage charge pump is a minimum capacitance realization of the switched-capacitor based voltage multiplier. A simulator working in the Q-V realm was used for simplified circuit level simulation and to estimate the number of required clock cycles to pump the output to a desired voltage. In order to evaluate the power delivered by a charge pump, a resistive load is attached to the output of the charge pump and an equivalent capacitance is evaluated. Power analysis is performed using an equivalent R-C circuit. A comparison of the proposed circuits with Dickson charge pump and Makowski’s voltage multipl...
... Segmentation and clustering in neural networks for image recognition. Jan, Ying-Wei. Display ... more ... Segmentation and clustering in neural networks for image recognition. Jan, Ying-Wei. Display Full Text | Download Full Text 2.55 MB PDF file. Degree Master of Science (MS), Ohio University, Electrical Engineering (Engineering), 1994. ...
This paper presents a simulation technique and a computer program for fast DC analysis of MOS tra... more This paper presents a simulation technique and a computer program for fast DC analysis of MOS transistor based VLSI circuits. Time domain analysis of a VLSI circuit is evaluated by a piecewise constant waveform approximation. This approximation is realized by repeatedly applying the developed DC analysis engine with initial conditions. All proposed methods such as device modeling, circuit partitioning and event-driven simulation were implemented and combined with such well known algorithms as modified nodal analysis (MNA), Katzenelson algorithm and Gaussian elimination in the form of a circuit simulation program: SAMOC. Time domain waveforms and benchmark circuit simulation results comparison of SPICE and SAMOC are presented
Proceedings of the 39th Midwest Symposium on Circuits and Systems, 1996
A VOLTAGE BASED WINNER TAKES A.LL CIRCUIT ... JANUS2 A. STARZYK AND YING-WE1 JAN School of Electr... more A VOLTAGE BASED WINNER TAKES A.LL CIRCUIT ... JANUS2 A. STARZYK AND YING-WE1 JAN School of Electrical Engineering and Computer Science Ohio University, Athens OH 45701 ... Absrract: Winner-take-all (WTA) is a usually used operation in neural network to locate ...
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