Languages and Compilers for Parallel Computing
15th Workshop, LCPC 2002, College Park, MD, USA, July 25-27, 2002. Revised Papers
Article
As the speed of mass spectrometers, sophistication of sample fractionation, and complexity of experimental designs increase, the volume of tandem mass spectra requiring reliable automated analysis continues to...
Chapter and Conference Paper
This paper presents an unbalanced tree search (UTS) benchmark designed to evaluate the performance and ease of programming for parallel applications requiring dynamic load balancing. We describe algorithms for...
Book and Conference Proceedings
15th Workshop, LCPC 2002, College Park, MD, USA, July 25-27, 2002. Revised Papers
Chapter and Conference Paper
We evaluate the impact of programming language features on the performance of parallel applications on modern parallel architectures, particularly for the demanding case of sparse integer codes. We compare a n...
Article
Explicit multithreading (XMT) is a parallel programming approach for exploiting on-chip parallelism. XMT introduces a computational framework with (1) a simple programming style that relies on fine-grained P...
Chapter and Conference Paper
Every new generation of computer architectures designed with high-performance microprocessors o.ers new potential gains in performance over the previous generation. The overall complexity of high-performance s...
Book and Conference Proceedings
13th International Workshop, LCPC 2000 Yorktown Heights, NY, USA, August 10–12, 2000 Revised Papers
Chapter and Conference Paper
Explicit-multithreading (XMT) is a parallel programming model designed for exploiting on-chip parallelism. Its features include a simple thread execution model and an efficient prefix-sum instruction for synch...
Chapter and Conference Paper
Irregular scientific codes experience poor cache performance due to their memory access patterns. In this paper, we examine two issues for locality optimizations for irregular computations. First, we experimen...
Chapter and Conference Paper
Modern microprocessors provide high performance by exploiting data locality with carefully designed multi-level caches. However, advanced scientific computations have features such as adaptive irregular memory...
Chapter and Conference Paper
Researchers have proposed several data and computation transformations to improve locality in irregular scientific codes. We ex- perimentally compare their performance and present gpart, a new tech- nique base...
Chapter and Conference Paper
Linear algebra codes contain data locality which can be exploited by tiling multiple loop nests. Several approaches to tiling have been suggested for avoiding conflict misses in low associativity caches. We pr...
Chapter and Conference Paper
Current compilers for distributed-memory multiprocessors parallelize irregular reductions either by generating calls to sophisticated run-time systems (CHAOS) or by relying on replicated buffers and the shared...
Article
Software distributed-shared-memory (DSM) systems provide an appealing target for parallelizing compilers due to their flexibility. Previous studies demonstrate such systems can provide performance comparable t...
Chapter and Conference Paper
Article
Compiler-parallelized applications are increasing in importance as moderate-scale multiprocessors become common. This paper evaluates how features of advanced memory systems (e.g., longer cache lines) impact m...