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Impact of virtual execution environments on processor energy consumption and hardware adaptation

Published: 14 June 2006 Publication History

Abstract

During recent years, microprocessor energy consumption has been surging and efforts to reduce power and energy have received a lot of attention. At the same time, virtual execution environments (VEEs), such as Java virtual machines, have grown in popularity. Hence, it is important to evaluate the impact of virtual execution environments on microprocessor energy consumption. This paper characterizes the energy and power impact of two important components of VEEs, Just-in-time(JIT) optimization and garbage collection. We find that by reducing instruction counts, JIT optimization significantly reduces energy consumption, while garbage collection incurs runtime overhead that consumes more energy. Importantly, both JIT optimization and garbage collection decrease the average power dissipated by a program. Detailed analysis reveals that both JIT optimizer and JIT optimized code dissipate less power than un-optimized code. On the other hand, being memory bound and with low ILP, the garbage collector dissipates less power than the application code, but rarely affects the average power of the latter.Adaptive microarchitectures are another recent trend for energy reduction where microarchitectural resources can be dynamically tuned to match program runtime requirements. This research reveals that both JIT optimization and garbage collection alter a program's behavior and runtime requirements, which considerably affects the adaptation of configurable hardware units, and influences the overall energy consumption. This work also demonstrates that the adaptation preferences of the two VEE services differ substantially from those of the application code. Both VEE services prefer a simple core for high energy reduction. On the other hand, the JIT optimizer usually requires larger data caches, while the garbage collector rarely benefits from large data caches. The insights gained in this paper point to novel techniques that can further reduce microprocessor energy consumption.

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    cover image ACM Conferences
    VEE '06: Proceedings of the 2nd international conference on Virtual execution environments
    June 2006
    194 pages
    ISBN:1595933328
    DOI:10.1145/1134760
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Published: 14 June 2006

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    Author Tags

    1. energy efficiency
    2. hardware adaptation
    3. power dissipation

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    • (2010)Design of a custom VEE core in a chip multiprocessorProceedings of the 2010 IEEE 8th Symposium on Application Specific Processors (SASP)10.1109/SASP.2010.5521138(97-100)Online publication date: 13-Jun-2010
    • (2009)Exploration of memory hierarchy configurations for efficient garbage collection on high-performance embedded systemsProceedings of the 19th ACM Great Lakes symposium on VLSI10.1145/1531542.1531549(3-8)Online publication date: 10-May-2009

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