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Exploiting power budgeting in thermal-aware dynamic placement for reconfigurable systems

Published: 18 August 2010 Publication History
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  • Abstract

    In this paper, a novel thermal-aware dynamic placement planner for reconfigurable systems is presented, which targets transient temperature reduction. Rather than solving time-consuming differential equations to obtain the hotspots, we propose a fast and accurate heuristic model based on power budgeting to plan the dynamic placements of the design statically, while considering the boundary conditions. Based on our heuristic model, we have developed a fast optimization technique to plan the dynamic placements at design time. Our results indicate that our technique is two orders of magnitude faster while the quality of the placements generated in terms of temperature and interconnection overhead is the same, if not better, compared to the thermal-aware placement techniques which perform thermal simulations inside the search engine.

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    Cited By

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    • (2017)Going Cooler With Timing-Constrained TeSHoP: A Temperature Sensing-Based Hotspot-Driven Placement Technique for FPGAsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2017.270712025:9(2525-2537)Online publication date: Sep-2017
    • (2016)TeSHoP: A Temperature Sensing based Hotspot-Driven Placement technique for FPGAs2016 26th International Conference on Field Programmable Logic and Applications (FPL)10.1109/FPL.2016.7577304(1-4)Online publication date: Aug-2016
    • (2013)Thermal-aware datapath merging for coarse-grained reconfigurable processorsProceedings of the Conference on Design, Automation and Test in Europe10.5555/2485288.2485679(1649-1654)Online publication date: 18-Mar-2013

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    1. Exploiting power budgeting in thermal-aware dynamic placement for reconfigurable systems

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        cover image ACM Conferences
        ISLPED '10: Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design
        August 2010
        458 pages
        ISBN:9781450301466
        DOI:10.1145/1840845
        Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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        Publication History

        Published: 18 August 2010

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        Author Tags

        1. computer aided design
        2. dynamic reconfiguration
        3. placement
        4. reconfigurable systems
        5. temperature

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        • (2017)Going Cooler With Timing-Constrained TeSHoP: A Temperature Sensing-Based Hotspot-Driven Placement Technique for FPGAsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2017.270712025:9(2525-2537)Online publication date: Sep-2017
        • (2016)TeSHoP: A Temperature Sensing based Hotspot-Driven Placement technique for FPGAs2016 26th International Conference on Field Programmable Logic and Applications (FPL)10.1109/FPL.2016.7577304(1-4)Online publication date: Aug-2016
        • (2013)Thermal-aware datapath merging for coarse-grained reconfigurable processorsProceedings of the Conference on Design, Automation and Test in Europe10.5555/2485288.2485679(1649-1654)Online publication date: 18-Mar-2013

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