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HERQULES: system level cross-layer design exploration for efficient energy-quality trade-offs

Published: 18 August 2010 Publication History
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  • Abstract

    In this paper, we present a unique cross-layer design framework that allows systematic exploration of the energy-delay-quality trade-offs at the algorithm, architecture and circuit level of design abstraction for each block of a system. In addition, taking into consideration the interactions between different sub-blocks of a system, it identifies the design solutions that can ensure the least energy at the "right amount of quality" for each sub-block/system under user quality/delay constraints. This is achieved by deriving sensitivity based design criteria, the balancing of which form the quantitative relations that can be used early in the system design process to evaluate the energy efficiency of various design options. The proposed framework when applied to the exploration of energy-quality design space of the main blocks of a digital camera and a wireless receiver, achieves 58% and 33% energy savings under 41% and 20% error increase, respectively.

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    Cited By

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    • (2023)Microarchitecture-Aware Timing Error Prediction via Deep Neural Networks2023 IEEE 29th International Symposium on On-Line Testing and Robust System Design (IOLTS)10.1109/IOLTS59296.2023.10224868(1-8)Online publication date: 3-Jul-2023
    • (2022)Robust Processing-In-Memory With Multibit ReRAM Using Hessian-Driven Mixed-Precision ComputationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2021.307840841:4(1006-1019)Online publication date: Apr-2022
    • (2022)Increased Leverage of Transprecision Computing for Machine Vision Applications at the EdgeJournal of Signal Processing Systems10.1007/s11265-022-01784-194:10(1101-1118)Online publication date: 30-Jun-2022
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    1. HERQULES: system level cross-layer design exploration for efficient energy-quality trade-offs

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      cover image ACM Conferences
      ISLPED '10: Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design
      August 2010
      458 pages
      ISBN:9781450301466
      DOI:10.1145/1840845
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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      Published: 18 August 2010

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      Author Tags

      1. energy efficient systems
      2. optimal design criteria
      3. voltage-scaling

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      View all
      • (2023)Microarchitecture-Aware Timing Error Prediction via Deep Neural Networks2023 IEEE 29th International Symposium on On-Line Testing and Robust System Design (IOLTS)10.1109/IOLTS59296.2023.10224868(1-8)Online publication date: 3-Jul-2023
      • (2022)Robust Processing-In-Memory With Multibit ReRAM Using Hessian-Driven Mixed-Precision ComputationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2021.307840841:4(1006-1019)Online publication date: Apr-2022
      • (2022)Increased Leverage of Transprecision Computing for Machine Vision Applications at the EdgeJournal of Signal Processing Systems10.1007/s11265-022-01784-194:10(1101-1118)Online publication date: 30-Jun-2022
      • (2018)Approximating Beyond the Processor: Exploring Full-System Energy-Accuracy Tradeoffs in a Smart Camera SystemIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2018.286426926:12(2884-2897)Online publication date: Dec-2018
      • (2018)Minimization of Timing Failures in Pipelined Designs via Path Shaping and Operand Truncation2018 IEEE 24th International Symposium on On-Line Testing And Robust System Design (IOLTS)10.1109/IOLTS.2018.8474084(171-176)Online publication date: Jul-2018
      • (2018)Approximate Systems: Synergistically Approximating Sensing, Computing, Memory, and Communication Subsystems for Energy EfficiencyApproximate Circuits10.1007/978-3-319-99322-5_17(349-368)Online publication date: 6-Dec-2018
      • (2015)Design methodology for approximate accumulator based on statistical error modelThe 20th Asia and South Pacific Design Automation Conference10.1109/ASPDAC.2015.7059011(237-242)Online publication date: Jan-2015
      • (2014)A Cross-Layer Reliability Design Methodology for Efficient, Dependable Wireless ReceiversACM Transactions on Embedded Computing Systems10.1145/258466613:4s(1-29)Online publication date: 1-Apr-2014
      • (2014)Reducing Energy at the Minimum Energy Operating Point Via Statistical Error CompensationIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2013.227183822:6(1328-1337)Online publication date: Jun-2014
      • (2013)Ten Years of Building Broken ChipsACM Transactions on Embedded Computing Systems10.1145/2465787.246578912:2s(1-23)Online publication date: 1-May-2013
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