research-article

Accurate modeling and calculation of delay and energy overheads of dynamic voltage scaling in modern high-performance microprocessors

Authors:

Naehyuck Chang,

Massoud PedramAuthors Info & Claims

ISLPED '10: Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design

Pages 419 - 424

https://doi.org/10.1145/1840845.1840938

Published: 18 August 2010 Publication History

Abstract

Dynamic voltage and frequency scaling (DVS) has been studied for well over a decade, and even commercial systems widely support DVS nowadays. Nevertheless, existing DVS transition overhead models do not accurately reflect modern DVS architectures including modern DC-DC converters, PLL (Phase Lock Loop), and voltage and frequency change policies. Incorrect DVS overhead models prevent one from achieving the maximum energy gain, by misleading the DVS control policies. This paper introduces an accurate DVS overhead model, in terms of both energy consumption and time penalty, through detailed observation of modern DVS setups and voltage and frequency change guidelines from vendors. We introduce new major contributors to the DVS overhead including the performance underdrive loss of the DVS-enabled microprocessor, additional inductor IR loss, and so on, as well as consideration of power efficiency from discontinuous-mode DC-DC conversion. Our DVS overhead model enhances the DVS overhead model accuracy from 86% to 238% for Intel Core2 Duo E6850 and LTC3733.

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https://doi.org/10.1016/j.micpro.2024.105023
Chowdhury PSchafer B(2021)Leveraging Automatic High-Level Synthesis Resource Sharing to Maximize Dynamical Voltage Overscaling with Error ControlACM Transactions on Design Automation of Electronic Systems10.1145/347390927:2(1-18)Online publication date: 2-Nov-2021
https://dl.acm.org/doi/10.1145/3473909
Ji DShin DPark J(2021)An Error Compensation Technique for Low-Voltage DNN AcceleratorsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2020.304151729:2(397-408)Online publication date: Mar-2021
https://doi.org/10.1109/TVLSI.2020.3041517
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Index Terms

Accurate modeling and calculation of delay and energy overheads of dynamic voltage scaling in modern high-performance microprocessors
1. Computing methodologies
  1. Modeling and simulation
    1. Model development and analysis
      1. Modeling methodologies
2. Hardware
  1. Hardware validation

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Published In

cover image ACM Conferences

ISLPED '10: Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design

August 2010

458 pages

ISBN:9781450301466

DOI:10.1145/1840845

General Chairs:
Vojin Oklobdzija
University of Texas, Dallas
,
Barry Pangle
Mentor Graphics
,
Naehyuck Chang
Seoul National University
,
Program Chairs:
Naresh Shanbhag
University of Illinois at Urbana-Champaign
,
Chris H. Kim
University of Minnesota

Copyright © 2010 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 18 August 2010

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ISLPED'10

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ISLPED'10: International Symposium on Low Power Electronics and Design

August 18 - 20, 2010

Texas, Austin, USA

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Overall Acceptance Rate 398 of 1,159 submissions, 34%

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ISLPED '24

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ACM/IEEE International Symposium on Low Power Electronics and Design

August 5 - 7, 2024

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Cited By

Toca-Díaz YHernández Palacios RGran Tejero RValero A(2024)Flip-and-Patch: A fault-tolerant technique for on-chip memories of CNN accelerators at low supply voltageMicroprocessors and Microsystems10.1016/j.micpro.2024.105023106(105023)Online publication date: Apr-2024
https://doi.org/10.1016/j.micpro.2024.105023
Chowdhury PSchafer B(2021)Leveraging Automatic High-Level Synthesis Resource Sharing to Maximize Dynamical Voltage Overscaling with Error ControlACM Transactions on Design Automation of Electronic Systems10.1145/347390927:2(1-18)Online publication date: 2-Nov-2021
https://dl.acm.org/doi/10.1145/3473909
Ji DShin DPark J(2021)An Error Compensation Technique for Low-Voltage DNN AcceleratorsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2020.304151729:2(397-408)Online publication date: Mar-2021
https://doi.org/10.1109/TVLSI.2020.3041517
Chowdhury PSchafer B(2021)Special Session: ADAPT: ANN-ControlleD System-Level Runtime Adaptable APproximate CompuTing2021 IEEE 39th International Conference on Computer Design (ICCD)10.1109/ICCD53106.2021.00012(1-4)Online publication date: Oct-2021
https://doi.org/10.1109/ICCD53106.2021.00012
Radfar MNakhlestani AViet HDesai A(2020)Battery Management Technique to Reduce Standby Energy Consumption in Ultra-Low Power IoT and Sensory ApplicationsIEEE Transactions on Circuits and Systems I: Regular Papers10.1109/TCSI.2019.294002267:1(336-345)Online publication date: Jan-2020
https://doi.org/10.1109/TCSI.2019.2940022
Sundriyal VKeipert KSosonkina MGordon M(2018)Effect of frequency scaling granularity on energy-saving strategiesThe International Journal of High Performance Computing Applications10.1177/1094342018774405(109434201877440)Online publication date: 15-May-2018
https://doi.org/10.1177/1094342018774405
Liu HLiu BYang LLin MDeng YBilal KKhan S(2018)Thermal-Aware and DVFS-Enabled Big Data Task Scheduling for Data CentersIEEE Transactions on Big Data10.1109/TBDATA.2017.27636124:2(177-190)Online publication date: 1-Jun-2018
https://doi.org/10.1109/TBDATA.2017.2763612
Zou ALeng JHe XZu YGill CReddi VZhang XOskin MInoue K(2018)Voltage-stacked GPUsProceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture10.1109/MICRO.2018.00039(390-402)Online publication date: 20-Oct-2018
https://dl.acm.org/doi/10.1109/MICRO.2018.00039
Sundriyal VFought ESosonkina MWindus T(2017)Evaluating effects of application based and automatic energy saving strategies on NWChemProceedings of the 25th High Performance Computing Symposium10.5555/3108096.3108112(1-12)Online publication date: 23-Apr-2017
https://dl.acm.org/doi/10.5555/3108096.3108112
(2017)Runtime power-aware energy-saving scheme for parallel applicationsInternational Journal of High Performance Systems Architecture10.1504/IJHPSA.2017.0914837:3(129-139)Online publication date: 1-Jan-2017
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