IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 25, NO. 3, MARCH 2010 775 A Passive Lossless Snubber Applied to the AC–DC Interleaved Boost Converter Carlos Alberto Gallo, Fernando Lessa Tofoli, and João Antonio Corrêa Pinto Abstract—High switching frequency operation of static power converters is often required to reduce size, weight, and electromagnetic interference levels, at the cost of increased switching losses and reduced efficiency. Switching losses include the current and voltage overlap loss during the switching interval and the capacitance loss during turn-on. Recently, the use of passive soft switching methods has been emphasized as a better alternative to active methods, mainly because they do not require extra switches or additional control circuitry. This paper proposes a passive lossless snubber applied to the interleaved boost converter. The use of a soft commutation cell causes the main switches to be turned on and off under null current and null voltage conditions, respectively, as high efficiency results over the entire load range. The theoretical analysis including the description of the operating stages and the design procedure are included. Experimental results on a 2 kW prototype are presented and discussed to validate the proposal. Index Terms—Interleaving techniques, passive snubbers, power factor correction, soft switching. I. INTRODUCTION N ORDER to meet the requirements in the proposed standards such as IEC 61000-3-2 and IEEE Std 519 on the quality of the input current that can be drawn by low-power equipment, a power factor correction (PFC) circuit is typically added at the utility interface of an ac–dc switch-mode power supply. The boost PFC circuit operating in continuous conduction mode (CCM) is by far the popular choice for medium and high power (400 W to a few kilowatts) application. Numerous boost-type topologies have been proposed over the past few years with the aim of improving the characteristics of the traditional converter, such as the reverse recovery problem of the boost diode [1], [2] and increase of the output voltage [3]. However, as the power rating increases, it is often required to associate converters in series or in parallel. In high-power applications, interleaving of two boost converters is very often employed to improve performance and reduce size of the PFC front end. Besides, for high current applications and voltage step-up, the currents through the switches I Manuscript received November 5, 2008; revised March 10, 2009 and July 24, 2009. Current version published April 2, 2010. Recommended for publication by Associate Editor P. Jain. C. A. Gallo is with the Department of Mechanical Engineering, Federal University of Uberlândia, CEP 38400-902 Uberlândia, MG, Brazil (e-mail: gallo@mecanica.ufu.br). F. L. Tofoli is with the Department of Electrical Engineering, Federal University of São João del-Rei, CEP 36307-352 São João del-Rei, MG, Brazil (e-mail: fernandolessa@ufsj.edu.br). J. A. C. Pinto is with the Department of Electrical Engineering, Federal Institute of Education, Science and Technology of Pará, CEP 66.240-260 Belém, PA, Brazil (e-mail: joao.pinto@ifpa.edu.br). Digital Object Identifier 10.1109/TPEL.2009.2033063 become just fractions of the input current [4]. Besides, interleaving effectively doubles the switching frequency and also partially cancels the input and output ripples, as the size of the energy storage inductors and differential-mode electromagnetic interference (EMI) filter in interleaved implementations can be reduced [5]–[12]. Reduction of size, weight, cost, and EMI in static power converters can be obtained by increasing the switching frequency. However, appreciable switching losses may result, compromising the overall efficiency. In front of such limitation, soft switching using resonant techniques is an attractive approach, while soft switching using lossless snubbers also gives an effective solution from the viewpoint of converter efficiency and extended utilization of power switching devices [13]–[15]. Power semiconductor devices commutate under two possible situations: hard and soft. With hard switching, the devices are supposed to change the states (ON or OFF) when both current and voltage are not null. High switching stresses are due to the overlap between voltage and current, and high switching losses result [16]. Soft switching is supposed to reduce the mentioned overlap between voltage and current during the commutation, and can be classified in either active or passive methods, as one must choose between the aforementioned snubbers for a given application. Active methods can reduce the switching losses by using auxiliary switches. Unfortunately, an auxiliary switch increases the complexity of both power and control circuits. Synchronization problems between control signals of the switches during transient also complicate the control strategy. Circuit cost is increased and reliability is affected by using active snubbers [17]. A passive lossless snubber can effectively restrict switching losses and EMI noise using no active components and no power dissipative components. No additional control is needed and no circulating energy is generated. Circuit structure is as simple as RCD snubbers while circuit efficiency is as high as active snubbers and resonant converters [18], [19]. Low cost, high performance, and high reliability are the distinct advantages of a passive lossless snubber [20]. Within this context, this paper presents a soft switching ac–dc interleaved boost converter, as a passive snubber with reduced complexity and low cost if compared with active circuits is introduced. The proposed structure is better recommended for high current applications, where a conventional boost converter may not be adequate [21]. The converter is discussed in detail, as the study is concerned with the operating principles, mathematical analysis, and experimental results on a 2 kW prototype. As it will be seen, significant advantages are achieved over the conventional interleaved boost converter by using this topology. 0885-8993/$26.00 © 2010 IEEE 776 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 25, NO. 3, MARCH 2010 Fig. 1. Interleaved boost converter operating with average current mode control. II. PROPOSED AC–DC INTERLEAVED BOOST CONVERTER The ac–dc interleaved boost converter is shown in Fig. 1. It operates with the average current mode control, which can be implemented with a PFC dedicated IC [22]. An optimum alternative that leads to high power levels at high switching frequencies lies in the nondissipative snubber represented in the dotted line for a single boost converter. The components of the circuit are two diodes Dr 11 and Dr 12 , one resonant capacitor Cr 1 , and one resonant inductor Lr 1 . At this point, it is worth to mention that the placement of Cr 1 and Lr 1 obeys criteria stated in [23] for the conception of passive lossless snubbers applied to boost-type topologies. An auxiliary power supply can be easily implemented from the converter circuit by coupling boost inductor Lb1 and inductor Lf b1 , and also adding one diode Df b1 , one auxiliary capacitor Caux , and one auxiliary inductor Laux . It must be mentioned that the absence of inductor Laux would lead to the necessity of an external voltage source for the correct operation of the proposed snubber. Of course, the proposed snubber can be applied to the conventional boost converter in a simple way by using the aforementioned elements. However, if the introduced concept is extended to interleaved converters, a single auxiliary power supply is necessary for a given number of interleaved cells defined as i. That is, only one auxiliary capacitor Caux and one auxiliary inductor Laux are necessary, as a single cell is used for the implementation of the power supply, although one boost inductor Lbi , one inductor Lf bi , and one diode Df bi are required per interleaved cell, what can be seen in Fig. 1. The derived circuit is responsible for providing energy to the resonance, with the consequent achievement of soft switching for the main switches during both turning on and turning off. Besides, the power supply can also be employed to feed the control circuitry without the need of additional auxiliary voltages. By interleaving the converters, the converter is always supposed to provide energy to the auxiliary power supply, even when duty cycle is low. Although the number of components seems rather large implying increased cost and volume, complexity is reduced if compared with the solution proposed in [17], where two auxiliary active switches are used, but the number of components is reduced. Other interleaved boost-type converters that employ active switches are presented in [24], [25], and [26]. Even though conduction losses tend to increase if compared with the traditional hard topology, the current flows through at most three semiconductor elements simultaneously (disregarding the diodes of the rectifier bridge) in any of the operating stages. As it will be seen in Section III, the application of the snubber cell is justified by the appreciable increase in the efficiency of the converter operating at high frequency. A. Operating Principle In order to study the proposed topology, the following conditions are assumed: 1) all switches and diodes are ideal; 2) input voltage Vi is constant and output voltage Vo is ripple less over one switching period; 3) inductors and capacitors are lossless and the output current is continuous during the operation. GALLO et al.: PASSIVE LOSSLESS SNUBBER APPLIED TO THE AC–DC INTERLEAVED BOOST CONVERTER By definition, the following expressions are valid: 1 ωo1 = √ Cr 1 Laux (1) 1 ωo2 = √ Cr 1 Lr 1 (2) ωo3 =
1 Cr 1 (Lr 1 + Laux )  Laux Io α= Vaux Cr 1 (4) K= Vo Vaux (5) K1 = Vdc1 Vaux (6) K2 = 1−K 1 + K1 (7) Vdc2 Vaux   1 + K1 1 − K22 Kb = K −1 K3 = 2K Kf + D α 1 + K1 Ke = α fs Kf = ω01 Kd = Km = Kd cos−1 K2 + Lr 1 = where ωo1 (3) Laux 2 (8) period. In this case, where two conventional boost converters are interleaved, the maximum duty cycle for each main switch is equal to D = 0.5. For this reason, resonances in two cells do not occur at the same time. Then, the converter uses only one auxiliary capacitor Caux and one auxiliary inductor Laux , which take part in the operation of one single cell at a time. First stage (t0 , t1 ): Before this stage begins, switch S1 is off and energy is transferred to the load by the source, analogously to the traditional boost converter, although the current flows through both inductors Lb1 and Lr 1 . When this stage effectively begins, switch S1 is turned on under null current condition, because inductor Lr 1 is linearly discharged through the loop involving Co /Ro , Db1 , and S1 . The auxiliary power supply maintains the resonance between Laux and Cr 1 , what persists until the voltage across capacitor Cr 1 equals the output voltage Vo , causing diode Dr 12 to be forward biased. It can be demonstrated that the current through inductor Laux is given by  Cr 1 (Vaux + Vdc1 ) sin ω01 t. (15) iL a u x (t) = Laux The voltage across capacitor Cr 1 is given by (9) (10) (11) (12) Kb (K − 1) α 777 (13) (14) resonance frequency between capacitor Cr 1 and inductor Laux in the first stage [rad/s]; ωo2 resonance frequency between capacitor Cr 1 and inductor Lr 1 in the fourth stage [rad/s]; ωo3 resonance frequency between capacitor Cr 1 , inductor Lr 1 and inductor Laux in the fifth stage [rad/s]; α normalized load current [A]; Io load current [A]; voltage across auxiliary capacitor Caux [V]; Vaux Vdc1 , Vdc2 initial and final values of the voltage across capacitor Cr 1 in the fifth stage, respectively [V]. The operation of the converter shown in Fig. 1 considering the positive half cycle of the input voltage is divided in six stages, according to Fig. 2. The main waveforms that describe the behavior of the circuit are shown in Fig. 3. A single cell is analyzed due to the inherent analogy between the converter legs. Besides, the cells in the interleaved boost converter do not operate simultaneously. In fact, the switching instants are sequentially phased over fractions of the switching vC r 1 (t) = Vaux − (Vaux + Vdc1 ) cos ω01 t. (16) The time interval that defines this stage is ∆t1 = t1 − t0 = arccos K2 . ω01 (17) Second stage (t1 , t2 ): While switch S1 is still on, the voltage across capacitor Cr 1 remains constant and clamped to Vo . Inductor Laux is linearly discharged through the loop formed by Dr 11 , Dr 12 , Co /Ro , and the auxiliary power supply. This stage is responsible for the pulsewidth modulation (PWM) characteristics of the converter, and it finishes when switch S1 is turned OFF. The current through inductor Laux is   (Vo − Vaux ) Cr 1 t+ (Vdc1 + Vaux ) 1 − K22 . iL a u x (t) = − Laux Laux (18) The time interval that defines this stage is   1 + K1 1 ∆t2 = t2 − t1 = 1 − K22 . (19) ω01 K − 1 Third stage (t2 , t3 ): While previously charged at Vo , resonant capacitor Cr 1 is now linearly discharged through the loop formed by Lb1 , Co /Ro , and Dr 12 , allowing switch S1 is turned off with null voltage in this stage. The voltage across Cr 1 is vC r 1 (t) = − I0 t + V0 . Cr 1 (20) The time interval that corresponds to this stage is ∆t3 = t3 − t2 = Cr 1 Vo . Io (21) Fourth stage (t3 , t4 ): There is resonance between inductor Lr 1 and capacitor Cr 1 , as the current through Lr 1 equals the 778 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 25, NO. 3, MARCH 2010 Fig. 2. Operating stages. (a) First stage (t0 , t1 ). (b) Second stage (t1 , t2 ). (c) Third stage (t2 , t3 ). (d) Fourth stage (t3 , t4 ). (e) Fifth stage (t4 , t5 ). (f) Sixth stage (t5 , t6 ). load current Io and capacitor Cr 1 is negatively charged at the end of this stage. The behavior of the current through Lr 1 and the voltage across Cr 1 can be expressed as iL r 1 (t) = I0 (1 − cos ω02 t) (22) vC r 1 (t) = Lr 1 I0 ω02 sen ω02 t. (23) The time interval that defines this stage is ∆t4 = t4 − t3 = 3π . 2ω02 (24) Fifth stage (t4 , t5 ): Resonance between capacitor Cr 1 and inductors Laux and Lr 1 occurs through the loop formed by Db1 , Co /Ro , Dr 11 , and the auxiliary power supply. This stage finishes when the current through Lr 1 equals the load current Io . The current through inductor Laux is iL a u x (t) = Cr 1 ω03 [(Vaux − V0 ) − Vdc2 ] sin ω03 t. (25) The voltage across capacitor Cr 1 is vC r 1 (t) = − [(Vaux − Vo ) − Vdc2 ] cos ω03 t. (26) The time interval that defines this stage is ∆t5 = t5 − t4 = π . ω03 (27) Sixth stage (t5 , t6 ): The voltage across resonant capacitor Cr 1 is clamped to the voltage assumed at the end of the previous resonant stage, until a new switching cycle begins. Boost inductor Lb1 provides energy to the load, as the operation of a conventional boost converter is observed. The time interval that defines this stage is ∆t6 = Ts − (∆t1 + ∆t2 + ∆t3 + ∆t4 + ∆t5 ) where Ts is the switching period. (28) GALLO et al.: PASSIVE LOSSLESS SNUBBER APPLIED TO THE AC–DC INTERLEAVED BOOST CONVERTER Fig. 4. 779 Duty cycle versus normalized load current. When switch S1 is turned off, inductor Lb1 is discharged. The interval during which the voltage across Lb1 is V0 − Vi is defined as ∆t′ ∆t′ = (1 − D) Ts − [∆t3 + ∆t4 + ∆t5 ] . (36) The voltage across Lb1 during ∆t′ is Fig. 3. Main theoretical waveforms. (Vo − Vi ) = Lb1 By definition, the static gain of the converter is Lb1 = (29) The gain can be obtained from the voltage across inductor Lb1 , when it is equal to the difference between the input voltage Vi and the output voltage V0 . While there is resonance and/or capacitor Cr 1 is charged, the voltage across Lb1 will always be different from Vi − V0 . When switch S1 is turned on, inductor Lb1 is charged and the following expression is valid: diL b1 (t) . (30) vL b1 (t) = Lb1 dt Since inductor Lb1 is charged linearly, expression (30) can be simplified as vL b1 ∆iL b1 = Lb1 ∆t (31) where vL b1 = Vi ∆iL b1 = Im ax − Im in = I0 ∆t = ∆t2 = (t2 − t1 ) = DTs (32) (33) (34) where Im ax and Im in are the upper and lower limits of the current through inductor Lb1 , considering the operation of the converter in CCM, ∆t is the interval that corresponds to the second stage, and D is the duty cycle. Substituting (32)–(34) in (30) gives Vi Io = . Lb1 DTs (37) From (35), one can obtain B. Static Gain of The Converter Vo G= . Vi Io . ∆t′ (35) Vi DTs . I0 (38) Substituting (38) in (37) gives (V0 − Vi ) = DTs Vi . ∆t′ (39) Dividing both sides of (39) by Vi and rearranging it in terms of (29), one can obtain the static gain as G=1+ DTs . ∆t′ (40) Expanding (40), the static gain can be finally expressed as D G=1+ (1 − D) − fs ω0 1  K α +π  3 √ 2 2 +   3 2 (41) where fs is the switching frequency. From (41), one can plot the curves in Fig. 4, where the duty cycle behavior is a function of the normalized current, for several values of the static gain. If α < 1, the output characteristic of the converter is similar to that of a quasi-resonant converter [24]. Otherwise if α ≥ 1, the output characteristic is the same of a PWM boost topology. C. Analysis of Semiconductor Elements The cells that constitute the interleaved boost converter operate analogously. Therefore, one can obtain the expressions for determining the stress of the semiconductor elements considering a single cell, what is detailed as follows. 780 Fig. 5. IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 25, NO. 3, MARCH 2010 Average current through switch S 1 . 1) Main Switch S1 : Switch S1 remains turned on during the first and second stages considering its respective switching cycle. By summing the average currents through the switch in both stages, one can obtain the total average current as (42), while Fig. 5 represents it plotted as a function of parameter α. One can see that the converter behaves as a quasi-resonant converter for low values of α. High average currents result then because the resonant tank provides a considerable amount of the total load current. When α is high enough, the resonant current is reduced at the cost of high duty cycle. Fig. 6. RMS current through switch S 1 . Fig. 7. Average current through diode D b 1 . IS 1(avg.) Kf 2K KB (K − 1) (Kf Kb )2 + K f Kb + + = I0 2D D α α √   Kf K 2 2K − 1 −1 . + + + Kf cos K2 + Kf 2D α α 2 (42) Analogously, the normalized rms current through switch S1 can be determined as  3 IS2 1(rm s) Kf Kd2 cos−1 K2 + 2Kf Kd Ke = I02 3  × (1 − K2 ) cos−1 K2 + 1 − K22 + Kf Kb Km + Kf Ke2 cos−1 K2 − K2 2  1 − K22 (Kf Kb )3 (Kf Kb )2 Km . (43) + 3D2 D Fig. 6 shows the rms current through the main switch as a function of α, which assumes a pattern similar to that observed in Fig. 5. 2) Diode Db1 : Current flows through diode Db1 during the first, fourth, fifth, and sixth stages, as the total average current through it is calculated from (44) and plotted in Fig. 7. One can see that the average current increases significantly when α is low, evidencing the contribution of the resonant circuit to the load current, such as in quasi-resonant converters. When α is high, the converter assumes the characteristic of a classical PWM topology, as the normalized average current tends to increase when α also does +  2 ID b1(avg.) K  −1 cos K2 + 1 = 1 − Kf I0 α 1 + 2K1 + Kb − √ . 2 (44) GALLO et al.: PASSIVE LOSSLESS SNUBBER APPLIED TO THE AC–DC INTERLEAVED BOOST CONVERTER Fig. 8. Rms current through diode D b 1 . Fig. 9. Average current through diode D r 1 1 . Fig. 10. RMS current through diode D r 1 1 . 781 Analogously, the rms current through Db1 is given by (45) and graphically represented by Fig. 8. The same characteristic assumed by the average current is also observed  2 ID 2    b1(rm s) = 1+Kf 2K cos−1K2 2K cos−1 −1 I02     3π+8 2 K + √ + K1 π − 4 −Kb − . 3 α 4 2 (45) 3) Diode Dr 11 : Current flows through diode Dr 11 during the first and second stages. The average current through this diode can be obtained by (46) and plotted as Fig. 9. One can see that the average current is low when α also is, since the converter assumes the characteristic of a quasi-resonant topology. When α is high, the contribution of the resonant tank to the load current becomes negligible 2 ID r 11(avg.) I02 = K 2 (3 − K) Kf K1 + K + b . α 2 (46) The rms current through diode Dr 11 is given by (47), and the respective graph is represented in Fig. 10. The same behavior observed in Fig. 9 is also verified in this case  2  ID Kf (1 + K1 )2 r 11(rm s) −1 K − K = 1 − K22 cos 2 2 I02 α2 2  2 3 (K − 1) − (K − 1) + 1 . + Kb 3 (47) 4) Diode Dr 12 : Current flows through diode Dr 12 during the second, third, and fourth stages. The resulting average current through this element can be obtained by (48), which can be plotted as Fig. 11. One can see that the average current tends to be constant when α > 1, which is a typical characteristic of PWM converters. If α ≪ 1, the resonant current becomes significant, as the converter assumes the behavior of a quasi-resonant structure ID r 12(avg.) Kb2 (3 − K) K 1 = Kf − −√ . I0 2α α 2 (48) Analogously, the rms current through Dr 12 can be determined from (49), and the respective curve is shown in Fig. 12. The same behavior developed by the average current is observed, as the 782 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 25, NO. 3, MARCH 2010 TABLE II PARAMETERS SET USED IN THE EXPERIMENTAL PROTOTYPE Fig. 11. Average current through diode D r 1 2 . The choice of parameter α in (54) must observe the PWM characteristics of the converter and also the reduction of the peak current through the main switches. From Fig. 4, if α = 1 and G = 4.0 are chosen, the duty cycle can be determined as 2D = 0.65. The effective pulse frequency of the input inductor current is twice that of the switching frequency. Therefore, the inductance value can be obtained as 220 × 0.65 Vi (2D) ∼ = = 500 µH. fs 2∆iL 100 × 103 × 2 × 1.5 (50) The resonance frequency fo must be greater than the switching frequency fs Lb1 = Lb2 = f0 = fs 100·103 = = 1.25 MHz. 0.08 0.08 (51) The design of the resonant elements is related to (51). Then expression (1) can be written as Fig. 12. RMS current through diode D r 1 2 . TABLE I CONVERTER SPECIFICATIONS ωo1 = √ 1 = 2πfo . Cr 1 Laux Substituting (51) in (52) gives Cr 1 Laux = 1.62 × 10−14 . Analogously, expression (4) can be rearranged as  2 Laux αVaux = . Cr 1 Io rms current becomes higher for low values of α  2 ID Kb2 (K − 1)2 r 12 − (K − 1) = 1 + K f I02 α2 3 + 12K cos −1  3π K + √ . (49) −1 + α 4 2 D. Design Procedure This section presents a design procedure for the proposed interleaved boost converter, whose specifications are given in Table I. (52) (53) (54) From (41), one can see that the static gain depends on parameter K, which defines the ration between the output voltage and the auxiliary voltage Vaux . Substituting α = 1, G = 4.0, 2D = 0.65, fs = 100 kHz, ω01 = 2π1.25 × 106 = 7.854 × 106 rad/s in (41), one can obtain Vaux = 11.767 V. The output current can be obtained from (55) Io = Po 2000 = 5 A. = Vo 400 (55) Solving the equation system represented by (52) and (54) gives Laux and Cr 1 as Cr 1 Laux ∼ = 1 µH ∼ = Cr 2 = 16 nF. (56) GALLO et al.: PASSIVE LOSSLESS SNUBBER APPLIED TO THE AC–DC INTERLEAVED BOOST CONVERTER 783 Fig. 13. Input voltage and input current at rated load. (a) Light load (250 W). Scales: V i 100 V/div.; Ii 1 A/div.; time 5 ms/div. Power factor = 0.981 THDV = 3.78%; THDI = 7.36%. (b) Rated load (2 kW). Scales: V i 100 V/div.; Ii 5 A/div.; time 5 ms/div. Power factor = 0.998; THDV = 3.34%; THDI = 5.76%. Fig. 14. Drain-to-source voltage and current waveforms of switch S 1 without using the proposed snubber. Scales: V S 1 200 V/div.; IS 1 4 A/div.; time 2 µs/div. It must be also mentioned that inductor Lr 1 can be determined from expression (14) Lr 1 = Lr 2 = 1 × 10−6 = 500 nH. 2 (57) III. EXPERIMENTAL RESULTS An experimental prototype of the converter was implemented using the parameters set shown in Table II. Results are discussed as follows. It must be also mentioned that the waveforms represented in Figs. 14–17 were acquired around the peak input voltage. Power factor correction for light load and rated load conditions is evidenced in Fig. 13(a) and (b), respectively. It also demonstrates that the use of the average current mode control is efficient causing the minimization of the total harmonic distortion of the input current. Fig. 14 presents the relevant waveforms of main switch S1 , where hard commutation is verified, causing appreciable switching losses and compromising the converter efficiency. Fig. 15 shows the soft commutation of switch S1 , which is turned on and off under zero current and zero voltage conditions, respectively, in both light and rated load conditions. Additionally, there are not high current and voltage peaks when the switch is turned on or off, respectively. Fig. 16 presents the relevant waveforms regarding the resonant elements, which are similar to those predicted in the theoretical analysis. Fig. 17 shows the currents through boost inductors Lb1 and Lb2 , where good current sharing between the interleaved converters is verified. Fig. 18 presents the input power factor as a function of the output power. The curve shows that high power factor is obtained along the entire load range. One can see that power factor is 0.998 at rated load, what is in according with the waveforms shown in Fig. 13. Finally, Fig. 19 shows the efficiency curves of the converter operating at 100 kHz with and without the passive snubber. As the output power increases, efficiency tends to decrease in the hard topology, which was evaluated to 2 kW, due to the appreciable conduction and switching losses. It can be seen that efficiency is significantly increased by the snubber for almost the entire load range, being higher than 98% at rated load. It must be also mentioned that such characteristic of the converter can be further improved if MOSFETs with reduced on-resistance are employed. Although the structure presented in [29] introduces a passive snubber with reduced number of components, efficiency at rated load is about 3% less than that of the converter proposed in this paper, where rated output power is 400 W and switching frequency is 40 kHz. According to Table II, the prototype implemented in this paper is rated at 2 kW operating at 100 kHz. One can see in Fig. 19 that efficiency at 400 W is almost the same, even though switching frequency is 2.5 times greater than that of the prototype designed in [29]. Another fair comparison can be established considering the topology presented in [30], where a simple circuit with coupled inductors is proposed, with maximum efficiency of 92.6%. Even though there are few components in the passive lossless clamp circuit, the switching frequency is 50 kHz. Since the experimental prototype specified in Table II operates at 100 kHz, high efficiency and reduction of size and volume of magnetics can be considered as prominent characteristics of the converter. 784 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 25, NO. 3, MARCH 2010 Fig. 15. Drain-to-source voltage and current waveforms of switch S1 using the proposed snubber. (a) Light load (250 W). Scales: VS 1 200 V/div.; IS 1 2 A/div.; time 1 µs /div. (b) Rated load (2 kW). Scales: VS 1 200 V/div.; IS 1 4 A/div.; time 1 µs/div. Fig. 16. Waveforms of the resonant elements. Scales: IL a u x 4 A/div.; IL r 1 : 2 A/div.; VC r 1 : 200 V/div.; time: 1.5 µs/div. Fig. 19. Efficiency versus output power. IV. CONCLUSION Fig. 17. Current through the boost inductors. Scales: IL b 1 , IL b 2 2 A/div.; time 10 µs/div. This paper has reported analytical and experimental results on a passive soft switching circuit applied to the interleaved boost converter. It has been demonstrated that the structure provides highly efficient power factor correction with negligible commutation losses, using the same number of switches of the hard-switched structure. The cell provides zero current switching for the main switches at turning on and zero voltage switching during turning off. The accurate operation of the circuit is validated by implementing and evaluating an experimental prototype. Efficiency tends to be quite high if compared with the conventional hard topology or similar approaches existent in the literature, even at high frequency operation or high power levels. The number of components can be seen as a drawback if the topology is compared to other interleaved boost converters. However, it must be mentioned that the converter efficiency at high frequency operation is significantly increased for a wide load range, without the need of using additional switches or control circuitry. Besides, reduced complexity and increased reliability are direct advantages of the proposed circuit. ACKNOWLEDGMENT Fig. 18. Power factor versus output power. The authors gratefully acknowledge INCT-EIE, CAPES, CNPq, and FAPEMIG for the support to this work. GALLO et al.: PASSIVE LOSSLESS SNUBBER APPLIED TO THE AC–DC INTERLEAVED BOOST CONVERTER REFERENCES [1] W. Y. Choi, J. Kwon, E. H. Kim, J. J. Lee, and B. H. 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[27] D. Wang, X. He, and R. Zhao, “ZVT interleaved boost converters with built-in voltage doubler and current auto-balance characteristic,” IEEE Trans. Power Electron., vol. 23, no. 6, pp. 2847–2854, Nov. 2008. [28] F. C. Lee, “High-frequency quasi-resonant converter technologies,” in Proc. IEEE, Apr. 1988, vol. 76, no. 4, pp. 337–389. [29] R. Gules, L. L. Pfitscher, and L. C. Franco, “An interleaved boost dc-dc converter with large conversion ratio,” in Proc. IEEE Int. Symp. Ind. Electron., 2003, pp. 411–416. [30] W. Li and X. He, “An interleaved winding-coupled boost converter with passive lossless clamp circuits,” IEEE Trans. Power Electron., vol. 22, no. 4, pp. 1499–1507, Jul. 2007. Carlos Alberto Gallo was born in São José do Rio Preto, Brazil, on June 18, 1974. He received the B.Sc., M.Sc., and Ph.D. degrees in electrical engineering from the Federal University of Uberlândia, Uberlândia, Brazil, in 2000, 2002, and 2005, respectively. Currently, he is a Professor in the Department of Mechanical Engineering, Federal University of Uberlândia. His research interests include highfrequency power conversion, microprocessor-based control of power converters, power factor correction topologies, and UPS systems. Fernando Lessa Tofoli was born in São Paulo, Brazil, on March 11, 1976. He received the B.Sc., M.Sc., and Ph.D. degrees in electrical engineering from the Federal University of Uberlândia, Uberlândia, Brazil, in 1999, 2002, and 2005, respectively. Currently, he is a Professor in the Department of Electrical Engineering, Federal Umiversity of São João del-Rei, São João del-Rei, Brazil. His research interests include power-quality-related issues, highpower factor rectifiers, and soft switching techniques applied to static power converters. João Antonio Corrêa Pinto was born in Belém, Brazil, on July 29, 1955. He received B.Sc. degree in both physics and electrical engineering from the Federal University of Pará, Pará, Brazil, in 1982 and 1992, respectively, and the M.Sc. and Ph.D. degrees in electrical engineering from the Federal University of Uberlândia, Uberlândia, Brazil, in 1997 and 2002, respectively. Currently, he is a Professor with the Department of Electrical Engineering, Federal Institute of Education, Science and Technology of Pará,, Belém. His research interests include high-frequency power conversion, modeling and control of converters, power factor correction circuits, UPS systems, and new converters topologies.