ANNA UNIVERSITY CHENNAI :: CHENNAI 600 025

AFFILIATED INSTITUTIONS ANNA UNIVERSITY, CHENNAI REGULATION – 2013 M.E. APPLIED ELECTRONICS I TO IV SEMESTERS CURRICUM AND SYLLABUS (FULL TIME) SEMESTER I SL. NO COURSE CODE THEORY MA7157 1 2 3 4 AP7101 AP7102 AP7103 5 6 PRACTICAL 1 AP7111 COURSE TITLE C L T P Applied Mathematics for Electronics Engineers Advanced Digital Signal Processing Advanced Digital Logic System Design Advanced Microprocessor and Microcontroller Elective I Elective II 3 1 0 4 3 3 3 1 0 0 0 0 0 4 3 3 3 3 0 0 0 0 3 3 Electronics System Design Laboratory I TOTAL 0 18 0 2 3 3 2 22 L T P C Analysis and Design of Analog Integrated Circuits ASIC and FPGA Design Embedded Systems Multicore Architectures Elective III Elective IV 3 0 0 3 3 3 3 3 3 0 0 0 0 0 0 0 0 0 0 3 3 3 3 3 Electronics System Design Laboratory II TOTAL 0 18 0 0 3 3 2 20 SEMESTER II SL. NO COURSE CODE THEORY AP7201 1 2 AP7202 3 AP7203 4 CP7103 5 6 PRACTICAL 1 AP7211 COURSE TITLE 1 SEMESTER III SL. COURSE NO CODE THEORY AP7301 1 2 3 PRACTICAL 4 AP7311 COURSE TITLE L T P C Electromagnetic Interference and Compatibility Elective V Elective VI 3 0 0 3 3 3 0 0 0 0 3 3 Project Work (Phase I) 0 9 0 0 12 12 6 15 L T P 0 0 0 0 24 24 TOTAL SEMESTER IV SL. COURSE NO CODE PRACTICAL 1 AP7411 COURSE TITLE Project Work (Phase II) TOTAL C 12 12 TOTAL NO. OF CREDITS: 69 2 LIST OF ELECTIVES ELECTIVE I SL. NO 1 COURSE CODE DS7201 2 COURSE TITLE L T P C Advanced Digital Image Processing 3 0 0 3 CU7006 Wavelet Transforms and Applications 3 0 0 3 3 IF7301 Soft Computing 3 0 0 3 4 AP7001 Computer Architecture and Parallel Processing 3 0 0 3 5 AP7002 Three Dimensional Network on Chip 3 0 0 3 ELECTIVE II 1 VL7201 CAD for VLSI Circuits 3 0 0 3 2 AP7003 Digital Control Engineering 3 0 0 3 3 AP7004 Hardware - Software Co Design 3 0 0 3 4 AP7005 Quantum Electronics 3 0 0 3 5 AP7006 Sensors and Signal Conditioning 3 0 0 3 ELECTIVE III 1 VL7102 VLSI Design Techniques 3 0 0 3 2 VL7202 Low Power VLSI Design 3 0 0 3 3 AP7007 Fiber Optic Sensors 3 0 0 3 4 AP7008 DSP Integrated Circuits 3 0 0 3 5 AP7009 RF System Design 3 0 0 3 6 VL7001 Analog and Mixed Mode VLSI Design 3 0 0 3 3 ELECTIVE IV 1 VL7006 Analog VLSI Design 3 0 0 3 2 VL7005 Physical Design of VLSI Circuits 3 0 0 3 3 VL7101 VLSI Signal Processing 3 0 0 3 4 AP7010 Data Converters 3 0 0 3 5 VL7103 Solid State Device Modeling and Simulation 3 0 0 3 6 NC7101 High Performance Networks 3 0 0 3 ELECTIVE V 1 VL7301 Testing of VLSI Circuits 3 0 0 3 2 VL7013 VLSI for Wireless Communication 3 0 0 3 3 AP7011 Photonics 3 0 0 3 4 AP7012 Nano Electronics 3 0 0 3 5 AP7013 Pattern Recognition 3 0 0 3 6 AP7014 Optical Computing 3 0 0 3 ELECTIVE VI 1 CP7030 Robotics 3 0 0 3 2 AP7015 Optical Imaging Techniques 3 0 0 3 3 CU7002 MEMS and NEMS 3 0 0 3 4 DS7301 Speech and Audio Signal Processing 3 0 0 3 5 AP7016 System on Chip Design 3 0 0 3 6 CP7023 Reconfigurable Computing 3 0 0 3 7 NC7202 Wireless Adhoc and Senor Networks 3 0 0 3 4 MA7157 APPLIED MATHEMATICS FOR ELECTRONICS ENGINEERS UNIT I FUZZY LOGIC Classical logic – Multivalued logics – Fuzzy propositions – Fuzzy quantifiers. L T PC 3 1 0 4 12 UNIT II MATRIX THEORY 12 Some important matrix factorizations – The Cholesky decomposition – QR factorization – Least squares method – Singular value decomposition - Toeplitz matrices and some applications. UNIT III ONE DIMENSIONAL RANDOM VARIABLES 12 Random variables - Probability function – moments – moment generating functions and their properties – Binomial, Poisson, Geometric, Uniform, Exponential, Gamma and Normal distributions – Function of a Random Variable. UNIT IV DYNAMIC PROGRAMMING 12 Dynamic programming – Principle of optimality – Forward and backward recursion – Applications of dynamic programming – Problem of dimensionality. UNIT V QUEUEING MODELS 12 Poisson Process – Markovian queues – Single and Multi-server Models – Little’s formula - Machine Interference Model – Steady State analysis – Self Service queue. L = 45: T=15; TOTAL: 60 PERIODS REFERENCES: 1. George J. Klir and Yuan, B., Fuzzy sets and fuzzy logic, Theory and applications, Prentice Hall of India Pvt. Ltd., 1997. 2. Moon, T.K., Sterling, W.C., Mathematical methods and algorithms for signal processing, Pearson Education, 2000. 3. Richard Johnson, Miller & Freund’s Probability and Statistics for Engineers, 7th Edition, Prentice – Hall of India, Private Ltd., New Delhi (2007). 4. Taha, H.A., Operations Research, An introduction, 7th edition, Pearson education editions, Asia, New Delhi, 2002. 5. Donald Gross and Carl M. Harris, Fundamentals of Queuing theory, 2nd edition, John Wiley and Sons, New York (1985). AP7101 ADVANCED DIGITAL SIGNAL PROCESSING LT P C 31 0 4 OBJECTIVES: The purpose of this course is to provide in-depth treatment on methods and techniques in • Discrete-time signal transforms, digital filter design, optimal filtering • Power spectrum estimation, multi-rate digital signal processing • DSP architectures which are of importance in the areas of signal processing, control and communications. 5 OUTCOMES: Students should be able to: • To design adaptive filters for a given application • To design multirate DSP systems. UNIT I DISCRETE RANDOM SIGNAL PROCESSING 9 Weiner Khitchine relation - Power spectral density – filtering random process, Spectral Factorization Theorem, special types of random process – Signal modeling-Least Squares method, Pade approximation, Prony’s method, iterative Prefiltering, Finite Data records, Stochastic Models. UNIT II SPECTRUM ESTIMATION 9 Non-Parametric methods - Correlation method - Co-variance estimator - Performance analysis of estimators – Unbiased consistent estimators - Periodogram estimator - Barlett spectrum estimation Welch estimation - Model based approach - AR, MA, ARMA Signal modeling - Parameter estimation using Yule-Walker method. UNIT III LINEAR ESTIMATION AND PREDICTION 9 Maximum likelihood criterion - Efficiency of estimator - Least mean squared error criterion - Wiener filter - Discrete Wiener Hoff equations - Recursive estimators - Kalman filter - Linear prediction, Prediction error - Whitening filter, Inverse filter - Levinson recursion, Lattice realization, Levinson recursion algorithm for solving Toeplitz system of equations. UNIT IV ADAPTIVE FILTERS 9 FIR Adaptive filters - Newton’s steepest descent method - Adaptive filters based on steepest descent method - Widrow Hoff LMS Adaptive algorithm - Adaptive channel equalization - Adaptive echo canceller - Adaptive noise cancellation - RLS Adaptive filters - Exponentially weighted RLS - Sliding window RLS - Simplified IIR LMS Adaptive filter. UNIT V MULTIRATE DIGITAL SIGNAL PROCESSING 9 Mathematical description of change of sampling rate - Interpolation and Decimation - Continuous time model - Direct digital domain approach - Decimation by integer factor - Interpolation by an integer factor - Single and multistage realization - Poly phase realization - Applications to sub band coding Wavelet transform and filter bank implementation of wavelet expansion of signals. L +T= 45+15 : 60 PERIODS REFERENCES: 1. Monson H. Hayes, “Statistical Digital Signal Processing and Modeling”, John Wiley and Sons Inc., New York, 2006. 2. Sophoncles J. Orfanidis, “Optimum Signal Processing “, McGraw-Hill, 2000. 3. John G. Proakis, Dimitris G. Manolakis, “Digital Signal Processing”, Prentice Hall of India, New Delhi, 2005. 4. Simon Haykin, “Adaptive Filter Theory”, Prentice Hall, Englehood Cliffs, NJ1986. 5. S. Kay,” Modern Spectrum Estimation Theory and Application”, prentice hall, englehood cliffs, nj1988. 6. P. P. Vaidyanathan, “multirate systems and filter banks”, prentice hall, 1992. 6 AP7102 ADVANCED DIGITAL LOGIC SYSTEM DESIGN L T PC 3 0 0 3 OBJECTIVES: • To analyze synchronous and asynchronous sequential circuits • To realize and design hazard free circuits • To familiarize the practical issues of sequential circuit design • To gain knowledge about different fault diagnosis and testing methods • To estimate the performance of digital systems • To know about timing analysis of memory and PLD UNIT I SEQUENTIAL CIRCUIT DESIGN 9 Analysis of Clocked Synchronous Sequential Networks (CSSN) - Modeling of CSSN – State Assignment and Reduction – Design of CSSN – Design of Iterative Circuits – ASM Chart – ASM Realization, Design of Arithmetic circuits for Fast adder- Array Multiplier. UNIT II ASYNCHRONOUS SEQUENTIAL CIRCUIT DESIGN 9 Analysis of Asynchronous Sequential Circuit (ASC) – Flow Table Reduction – Races in ASC – State Assignment Problem and the Transition Table – Design of ASC – Static and Dynamic Hazards – Essential Hazards – Design of Hazard free circuits - Data Synchronizers – Designing Vending Machine Controller – Mixed Operating Mode Asynchronous Circuits. Practical issues such as clock skew, synchronous and asynchronous inputs and switch bouncing. UNIT III FAULT DIAGNOSIS & TESTING 9 Fault diagnosis: Fault Table Method – Path Sensitization Method – Boolean Difference Method – Kohavi Algorithm – Tolerance Techniques – The Compact Algorithm. Design for testability: Test Generation – Masking Cycle – DFT Schemes. Circuit testing fault model, specific and random faults, testing of sequential circuits, Built in Self Test, Built in Logic Block observer (BILBO), signature analysis. UNIT IV PERFORMANCE ESTIMATION 9 Estimating digital system reliability, transmission lines, reflections and terminations, system integrity, network issues for digital systems, formal verifications of digital system: model-checking, binary decision diagram, theorem proving, circuit equivalence. UNIT V TIMING ANALYSIS 9 ROM timings, Static RAM timing, Synchronous Static RAM and it’s timing, Dynamic RAM timing, Complex Programmable Logic Devices, Logic Analyzer Basic Architecture, Internal structure, Data display, Setup and Control, Clocking and Sampling. TOTAL: 45 PERIODS REFERENCES: 1. Charles H.Roth Jr “Fundamentals of Logic Design”, Thomson Learning 2004. 2. Nripendra N Biswas “Logic Design Theory” Prentice Hall of India, 2001. 3. Parag K.Lala “An introduction to Logic Circuit Testing” Morgan and claypool publishers, 2009. 4. Stephen D Brown, “Fundamentals of digital logic”, TMH publication, 2007. 5. Balabanian, “Digital Logic Design Principles”, Wiley publication, 2007. 6. Stalling, “Computer Organization & Architecture”, Pearson Education India, 2008. 7. J.F.Wakerly, “Digital Design”, Pearson Education India, 2012. 8. J.F.Wakerly, “Digital Design principles and practices”, PHI publications, 2005. 9. Charles J. Sipil, Microcomputer Handbook McCrindle- Collins Publications 1977. 7 AP7103 ADVANCED MICROPROCESSOR AND MICROCONTROLLER L T PC 3 0 0 3 OBJECTIVES: • To familiarize the fundamental concepts of microprocessor architecture. • To gain knowledge about high performance CISC and RISC architectures. • To study about 8 bit Microcontrollers viz. 68HC11 and PIC. UNIT I OVERVIEW 9 Generic Architecture--Instruction Set – Data formats –Addressing modes – Memory hierarchy – register file –Cache – Virtual memory and paging – Segmentation- pipelining –the instruction pipeline – pipeline hazards – instruction level parallelism – reduced instruction set –Computer principles – RISC versus CISC. UNIT II HIGH PERFORMANCE CISC ARCHITECTURE – PENTIUM 9 CPU Architecture- Bus Operations – Pipelining – Brach predication – floating point unit-Operating Modes –Paging – Multitasking – Exception and Interrupts – Instruction set –addressing modes – Programming the Pentium processor. UNIT III HIGH PERFORMANCE RISC ARCHITECTURE – ARM 9 Organization of CPU – Bus architecture –Memory management unit - ARM instruction set- Thumb Instruction set- addressing modes – Programming the ARM processor.6 UNIT IV MOTOROLA 68HC11 MICROCONTROLLERS 9 Instruction set addressing modes – operating modes- Interrupt system- RTC-Serial Communication Interface – A/D Converter PWM and UART. UNIT V PIC MICROCONTROLLER 9 CPU Architecture – Instruction set – interrupts- Timers- I2C Interfacing – UART- A/D Converter –PWM and introduction to C-Compilers. TOTAL:45 PERIODS REFERENCES: 1. Daniel Tabak , ‘’Advanced Microprocessors” McGraw Hill.Inc., 1995 2. James L. Antonakos , “ The Pentium Microprocessor ‘’ Pearson Education , 1997. 3. Steve Furber, ‘’ ARM System –On –Chip architecture “Addision Wesley , 2000. 4. Gene .H.Miller .” Micro Computer Engineering ,” Pearson Education , 2003. 5. John .B.Peatman , “ Design with PIC Microcontroller , Prentice hall, 1997. 6. James L.Antonakos ,” An Introduction to the Intel family of Microprocessors ‘’ Pearson Education 1999. 7. Barry.B.Breg,” The Intel Microprocessors Architecture , Programming and Interfacing “ , PHI,2002. 8. Valvano "Embedded Microcomputer Systems" Thomson Asia PVT LTD first reprint 2001. 8 AP7111 1. 2. 3. 4. 5. 6. 7. 8. ELECTRONICS SYSTEM DESIGN LABORATORY I L T PC 0 0 3 2 System design using PIC, MSP430, ‘51 Microcontroller and 16- bit Microprocessor - 8086. Study of different interfaces ( using embedded microcontroller) Implementation of Adaptive Filters and multistage multirate system in DSP Processor Simulation of QMF using Simulation Packages Analysis of Asynchronous and clocked synchronous sequential circuits Built in self test and fault diagnosis Sensor design using simulation tools Design and analysis of real time signal processing system – Data acquisition and signal processing TOTAL: 45 PERIODS AP7201 ANALYSIS AND DESIGN OF ANALOG INTEGRATED CIRCUITS LTPC 3003 OBJECTIVES: • To design the single stage amplifiers using pmos and nmos driver circuits with different loads. • To analyze high frequency concepts of single stage amplifiers and noise characteristics associated with differential amplifiers. • To study the different types of current mirrors and to know the concepts of voltage and current reference circuits. UNIT I SINGLE STAGE AMPLIFIERS 9 Common source stage, Source follower, Common gate stage, Cascode stage, Single ended and differential operation, Basic differential pair, Differential pair with MOS loads UNIT II FREQUENCY RESPONSE AND NOISE ANALYSIS 9 Miller effect ,Association of poles with nodes, frequency response of common source stage, Source followers, Common gate stage, Cascode stage, Differential pair, Statistical characteristics of noise, noise in single stage amplifiers, noise in differential amplifiers. UNIT III OPERATIONAL AMPLIFIERS 9 Concept of negative feedback, Effect of loading in feedback networks, operational amplifier performance parameters, One-stage Op Amps, Two-stage Op Amps, Input range limitations, Gain boosting, slew rate, power supply rejection, noise in Op Amps. UNIT IV STABILITY AND FREQUENCY COMPENSATION 9 General considerations, Multipole systems, Phase Margin, Frequency Compensation, and Compensation of two stage Op Amps, Slewing in two stage Op Amps, and Other compensation techniques. UNIT V BIASING CIRCUITS 9 Basic current mirrors, cascode current mirrors, active current mirrors, voltage references, supply independent biasing, temperature independent references, PTAT current generation, Constant-Gm Biasing. TOTAL:45 PERIODS 9 REFERENCES: 1. Paul R. Gray, Paul J. Hurst, Stephen H. Lewis, Robert G. Meyer, Analysis and Design of Analog Integrated Circuits, 5th Edition, Wiley, 2009. 2. Behzad Razavi, “Design of Analog CMOS Integrated Circuits”, Tata McGraw Hill, 2001 3. Willey M.C. Sansen, “Analog design essentials”, Springer, 2006. 4. Grebene, “Bipolar and MOS Analog Integrated circuit design”, John Wiley & sons,Inc., 2003. 5. Phillip E.Allen, Douglas R.Holberg, “CMOS Analog Circuit Design”, Second edition, Oxford University Press, 2002 AP7202 ASIC AND FPGA DESIGN LTPC 3 003 OBJECTIVES: • To study the design flow of different types of ASIC. • To familiarize the different types of programming technologies and logic devices. • To learn the architecture of different types of FPGA. • To gain knowledge about partitioning, floor planning, placement and routing including circuit extraction of ASIC • To analyse the synthesis, Simulation and testing of systems. • To understand the design issues of SOC. • To know about different high performance algorithms and its applications in ASICs. UNIT I OVERVIEW OF ASIC AND PLD 9 Types of ASICs - Design flow – CAD tools used in ASIC Design – Programming Technologies: Antifuse – static RAM – EPROM and EEPROM technology, Programmable Logic Devices : ROMs and EPROMs – PLA –PAL. Gate Arrays – CPLDs and FPGAs UNIT II ASIC PHYSICAL DESIGN 9 System partition -partitioning - partitioning methods – interconnect delay models and measurement of delay - floor planning - placement – Routing : global routing - detailed routing - special routing - circuit extraction - DRC UNIT III LOGIC SYNTHESIS, SIMULATION AND TESTING 9 Design systems - Logic Synthesis - Half gate ASIC -Schematic entry - Low level design language PLA tools -EDIF- CFI design representation. Verilog and logic synthesis -VHDL and logic synthesis types of simulation -boundary scan test - fault simulation - automatic test pattern generation. UNIT IV FPGA 9 Field Programmable gate arrays- Logic blocks, routing architecture, Design flow technology - mapping for FPGAs, Xilinx XC4000 - ALTERA’s FLEX 8000/10000, ACTEL’s ACT-1,2,3 and their speed performance Case studies: Altera MAX 5000 and 7000 - Altera MAX 9000 – Spartan II and Virtex II FPGAs - Apex and Cyclone FPGAs UNIT V SOC DESIGN 9 Design Methodologies – Processes and Flows - Embedded software development for SOC – Techniques for SOC Testing – Configurable SOC – Hardware / Software codesign Case studies: Digital camera, Bluetooth radio / modem, SDRAM and USB TOTAL: 45 PERIODS 10 REFERENCES: 1. M.J.S .Smith, "Application Specific Integrated Circuits, Addison -Wesley Longman Inc., 1997 2. S. Trimberger, Field Programmable Gate Array Technology, Edr, Kluwer Academic Publications, 1994. 3. John V.Oldfield, Richard C Dore, Field Programmable Gate Arrays, Wiley Publications 1995. 4. P.K.Chan & S. Mourad, Digital Design Using Field Programmable Gate Array, Prentice Hall, 1994. 5. Parag.K.Lala, Digital System Design using Programmable Logic Devices , BSP, 2003. 6. S. Brown, R. Francis, J. Rose, Z. Vransic, Field Programmable Gate Array, Kluwer Pubin, 1992. 7. J. Old Field, R.Dorf, Field Programmable Gate Arrays, John Wiley & Sons, Newyork, 1995. 8. Farzad Nekoogar and Faranak Nekoogar, From ASICs to SOCs: A Practical Approach, Prentice Hall PTR, 2003. 9. Wayne Wolf, FPGA-Based System Design, Prentice Hall PTR, 2004. 10. R. Rajsuman, System-on-a-Chip Design and Test. Santa Clara, CA: Artech House Publishers, 2000. 11. F. Nekoogar. Timing Verification of Application-Specific Integrated Circuits (ASICs). Prentice Hall PTR, 1999. AP7203 EMBEDDED SYSTEMS LTPC 3 00 3 OBJECTIVES: • To afford awareness about Hardware and software design architecture for embedded processors with real time examples. • To learn various techniques of system design. UNIT I INTRODUCTION 9 Embedded Computers, Characteristics of Embedded Computing Applications, Challenges in Embedded Computing system design, Embedded system design process- Requirements, Specification, Architectural Design, Designing Hardware and Software Components, System Integration, Formalism for System Design- Structural Description, Behavioural Description, Design Example: Model Train Controller, ARM processor- processor and memory organization. UNIT II EMBEDDED PROCESSORS 9 Data operations, Flow of Control, SHARC processor- Memory organization, Data operations, Flow of Control, parallelism with instructions, CPU Bus configuration, ARM Bus, SHARC Bus, Memory devices, Input/output devices, Component interfacing, designing with microprocessor development and debugging, Design Example : Alarm Clock. Hybrid Architecture UNIT III DISTRIBUTED EMBEDDED ARCHITECTURE 9 Hardware and Software Architectures, Networks for embedded systems- I2C, CAN Bus, SHARC link supports, Ethernet, Myrinet, Internet, Network-Based design- Communication Analysis, system performance Analysis, Hardware platform design, Allocation and scheduling, Design Example: Elevator Controller. 11 UNIT IV REAL-TIME CHARACTERISTICS 9 Clock driven Approach, weighted round robin Approach, Priority driven Approach, Dynamic Versus Static systems, effective release times and deadlines, Optimality of the Earliest deadline first (EDF) algorithm, challenges in validating timing constraints in priority driven systems, Off-line Versus On-line scheduling. UNIT V SYSTEM DESIGN TECHNIQUES 9 Design Methodologies, Requirement Analysis, Specification, System Analysis and Architecture Design, Quality Assurance, Design Example: Telephone PBX- System Architecture, Ink jet printerHardware Design and Software Design, Personal Digital Assistants, Set-top Boxes. TOTAL: 45 PERIODS REFERENCES: 1. Wayne Wolf, “Computers as Components: Principles of Embedded Computing System Design”, Morgan Kaufman Publishers, 2008. 2. Jane.W.S. Liu, “Real-Time systems”, Pearson Education Asia, 2000. 3. C. M. Krishna and K. G. Shin, “Real-Time Systems” , McGraw-Hill, 1997 4. Frank Vahid and Tony Givargis, “Embedded System Design: A Unified Hardware/Software Introduction” , John Wiley & Sons, 2006. CP7103 MULTI CORE ARCHITECTURES LTPC 3 003 COURSE OBJECTIVES: • To understand the recent trends in the field of Computer Architecture and identify performance related parameters • To appreciate the need for parallel processing • To expose the students to the problems related to multiprocessing • To understand the different types of multicore architectures • To expose the students to warehouse-scale and embedded architectures UNIT I FUNDAMENTALS OF QUANTITATIVE DESIGN AND ANALYSIS 9 Classes of Computers – Trends in Technology, Power, Energy and Cost – Dependability – Measuring, Reporting and Summarizing Performance – Quantitative Principles of Computer Design – Classes of Parallelism - ILP, DLP, TLP and RLP - Multithreading - SMT and CMP Architectures – Limitations of Single Core Processors - The Multicore era – Case Studies of Multicore Architectures. UNIT II DLP IN VECTOR, SIMD AND GPU ARCHITECTURES 9 Vector Architecture - SIMD Instruction Set Extensions for Multimedia – Graphics Processing Units Detecting and Enhancing Loop Level Parallelism - Case Studies. UNIT III TLP AND MULTIPROCESSORS 9 Symmetric and Distributed Shared Memory Architectures – Cache Coherence Issues - Performance Issues – Synchronization Issues – Models of Memory Consistency - Interconnection Networks – Buses, Crossbar and Multi-stage Interconnection Networks. UNIT IV RLP AND DLP IN WA REHOUSE-SCALE ARCHITECTURES 9 Programming Models and Workloads for Warehouse-Scale Computers – Architectures for Warehouse-Scale Computing – Physical Infrastructure and Costs – Cloud Computing – Case Studies. 12 UNIT V ARCHITECTURES FOR EMBEDDED SYSTEMS 9 Features and Requirements of Embedded Systems – Signal Processing and Embedded Applications – The Digital Signal Processor – Embedded Multiprocessors - Case Studies. TOTAL:45 PERIODS OUTCOMES: Upon completion of the course, the students will be able to • Identify the limitations of ILP and the need for multicore architectures • Discuss the issues related to multiprocessing and suggest solutions • Point out the salient features of different multicore architectures and how they exploit parallelism • Critically analyze the different types of inter connection networks • Discuss the architecture of GPUs, warehouse-scale computers and embedded processors\ REFERENCES: 1. John L. Hennessey and David A. Patterson, “ Computer Architecture – A Quantitative Approach”, Morgan Kaufmann / Elsevier, 5th edition, 2012. 2. Kai Hwang, “Advanced Computer Architecture”, Tata McGraw-Hill Education, 2003 3. Richard Y. Kain, “Advanced Computer Architecture a Systems Design Approach”, Prentice Hall, 2011. 4. David E. Culler, Jaswinder Pal Singh, “Parallel Computing Architecture : A Hardware/ Software Approach” , Morgan Kaufmann / Elsevier, 1997. AP7211 1. 2. 3. 4. 5. 6. 7. 8. 9. ELECTRONICS SYSTEM DESIGN LABORATORY II L T PC 0 0 3 2 Study of 32 bit ARM7 microcontroller RTOS and its application Testing RTOS environment and system programming Designing of wireless network using embedded systems Implementation of ARM with FPGA Design and Implementation of ALU in FPGA using VHDL and Verilog Modeling of Sequential Digital system using Verilog and VHDL Flash controller programming - data flash with erase, verify and fusing System design using ASIC Design, simulation and analysis of signal integrity TOTAL: 45 PERIODS 13 AP7301 ELECTROMAGNETIC INTERFERENCE AND COMPATIBILITY L T P C 3 0 0 3 OBJECTIVES: • To understand the basics of EMI • To study EMI Sources • To understand EMI problems • To understand Solution methods in PCB • To understand Measurement technique for emission • To understand Measurement technique for immunity UNIT I EMI/EMC CONCEPTS 9 EMI-EMC definitions and Units of parameters; Sources and victim of EMI; Conducted and Radiated EMI Emission and Susceptibility; Transient EMI, ESD; Radiation Hazards. UNIT II EMI COUPLING PRINCIPLES 9 Conducted, radiated and transient coupling; Common ground impedance coupling ; Common mode and ground loop coupling ; Differential mode coupling ; Near field cable to cable coupling, cross talk ; Field to cable coupling ; Power mains and Power supply coupling. UNIT III EMI CONTROL TECHNIQUES 9 Shielding- Shielding Material-Shielding integrity at discontinuities, Filtering- Characteristics of FiltersImpedance and Lumped element filters-Telephone line filter, Power line filter design, Filter installation and Evaluation, Grounding- Measurement of Ground resistance-system grounding for EMI/EMCCable shielded grounding, Bonding, Isolation transformer, Transient suppressors, Cable routing, Signal control. EMI gaskets UNIT IV EMC DESIGN OF PCBS 9 EMI Suppression Cables-Absorptive, ribbon cables-Devices-Transient protection hybrid circuits ,Component selection and mounting; PCB trace impedance; Routing; Cross talk controlElectromagnetic Pulse-Noise from relays and switches, Power distribution decoupling; Zoning; Grounding; VIAs connection; Terminations. UNIT V EMI MEASUREMENTS AND STANDARDS 9 Open area test site; TEM cell; EMI test shielded chamber and shielded ferrite lined anechoic chamber; Tx /Rx Antennas, Sensors, Injectors / Couplers, and coupling factors; EMI Rx and spectrum analyzer; Civilian standards-CISPR, FCC, IEC, EN; Military standards-MIL461E/462. Frequency assignment - spectrum conversation. British VDE standards, Euro norms standards in japan comparisons. EN Emission and Susceptibility standards and Specifications. TOTAL: 45PERIODS OUTCOMES: Upon Completion of the course, the students will be able to • To design a EMI free system • To reduce system level crosstalk • To design high speed Printed Circuit board with minimum interference • To make our world free from unwanted electromagnetic environment 14 REFERENCES: 1. V.P.Kodali, “Engineering EMC Principles, Measurements and Technologies”, IEEE Press, Newyork, 1996 2. Clayton R.Paul,” Introduction to Electromagnetic Compatibility”, John Wiley Publications, 2008 3. Henry W.Ott.,”Noise Reduction Techniques in Electronic Systems”, A Wiley Inter Science Publications, John Wiley and Sons, New york, 1988. 4. Bemhard Keiser, “Principles of Electromagnetic Compatibility”, 3rd Ed, Artech house, Norwood, 1986. 5. Don R.J.White Consultant Incorporate, “Handbook of EMI/EMC”, Vol I-V, 1988. DS7201 ADVANCED DIGITAL IMAGE PROCESSING LTPC 3 0 03 OBJECTIVES: • To understand the image fundamentals and mathematical transforms necessary for image processing and to study the image enhancement techniques. • To understand the image segmentation and representation techniques. • To understand how image are analyzed to extract features of interest. • To introduce the concepts of image registration and image fusion. • To analyze the constraints in image processing when dealing with 3D data sets. UNIT I FUNDAMENTALS OF DIGITAL IMAGE PROCESSING 9 Elements of visual perception, brightness, contrast, hue, saturation, mach band effect, 2D image transforms-DFT, DCT, KLT, and SVD. Image enhancement in spatial and frequency domain, Review of morphological image processing UNIT II SEGMENTATION 9 Edge detection, Thresholding, Region growing, Fuzzy clustering, Watershed algorithm, Active contour methods, Texture feature based segmentation, Model based segmentation, Atlas based segmentation, Wavelet based Segmentation methods UNIT III FEATURE EXTRACTION 9 First and second order edge detection operators, Phase congruency, Localized feature extractiondetecting image curvature, shape features Hough transform, shape skeletonization, Boundary descriptors, Moments, Texture descriptors- Autocorrelation, Co-occurrence features, Runlength features, Fractal model based features, Gabor filter, wavelet features UNIT IV REGISTRATION AND IMAGE FUSION 9 Registration- Preprocessing, Feature selection-points, lines, regions and templates Feature correspondence-Point pattern matching, Line matching, region matching Template matching .Transformation functions-Similarity transformation and Affine Transformation. Resampling- Nearest Neighbour and Cubic Splines Image Fusion-Overview of image fusion, pixel fusion, Multiresolution based fusion discrete wavelet transform, Curvelet transform. Region based fusion. 15 UNIT V 3D IMAGE VISUALIZATION 9 Sources of 3D Data sets, Slicing the Data set, Arbitrary section planes, The use of color, Volumetric display, Stereo Viewing, Ray tracing, Reflection, Surfaces, Multiply connected surfaces, Image processing in 3D, Measurements on 3D images. TOTAL: 45 PERIODS OUTCOMES: Upon Completion of the course, the students will be able to • To understand image formation and the role human visual system plays in perception of gray and color image data. • To apply image processing techniques in both the spatial and frequency (Fourier) domains. • To design image analysis techniques in the form of image segmentation and to evaluate the methodologies for segmentation. • To conduct independent study and analysis of feature extraction techniques. • To understand the concepts of image registration and image fusion. • To analyze the constraints in image processing when dealing with 3D data sets and to apply image processing algorithms in practical applications. TEXT BOOKS: 1. John C.Russ, “The Image Processing Handbook”, CRC Press,2007. 2. Mark Nixon, Alberto Aguado, “Feature Extraction and Image Processing”, Academic Press, 2008. 3. Ardeshir Goshtasby, “ 2D and 3D Image registration for Medical, Remote Sensing and Industrial Applications”,John Wiley and Sons,2005. REFERENCES: 1. Rafael C. Gonzalez, Richard E. Woods, , Digital Image Processing’, Pearson,Education, Inc., Second Edition, 2004. 2. Anil K. Jain, , Fundamentals of Digital Image Processing’, Pearson Education,Inc., 2002. 3. Rick S.Blum, Zheng Liu,“ Multisensor image fusion and its Applications“,Taylor& Francis,2006. CU7006 WAVELET TRANSFORMS AND APPLICATIONS LTPC 3 003 OBJECTIVES: • To study the basics of signal representation and Fourier theory • To understand Multi Resolution Analysis and Wavelet concepts • To study the wavelet transform in both continuous and discrete domain • To understand the design of wavelets using Lifting scheme • To understand the applications of Wavelet transform UNIT I FUNDAMENTALS 9 Vector Spaces – Properties– Dot Product – Basis – Dimension, Orthogonality and Orthonormality – Relationship Between Vectors and Signals – Signal Spaces – Concept of Convergence – Hilbert Spaces for Energy Signals- Fourier Theory: Fourier series expansion, Fourier transform, Short time Fourier transform, Time-frequency analysis. 16 UNIT II MULTI RESOLUTION ANALYSIS 9 Definition of Multi Resolution Analysis (MRA) – Haar Basis – Construction of General Orthonormal MRA – Wavelet Basis for MRA – Continuous Time MRA Interpretation for the DTWT – Discrete Time MRA – Basis Functions for the DTWT – PRQMF Filter Banks. UNIT III CONTINUOUS WAVELET TRANSFORMS 9 Wavelet Transform – Definition and Properties – Concept of Scale and its Relation with Frequency – Continuous Wavelet Transform (CWT) – Scaling Function and Wavelet Functions (Daubechies Coiflet, Mexican Hat, Sinc, Gaussian, Bi Orthogonal)– Tiling of Time – Scale Plane for CWT. UNIT IV DISCRETE WAVELET TRANSFORMS 9 Filter Bank and Sub Band Coding Principles – Wavelet Filters – Inverse DWT Computation by Filter Banks – Basic Properties of Filter Coefficients – Choice of Wavelet Function Coefficients – Derivations of Daubechies Wavelets – Mallat’s Algorithm for DWT – Multi Band Wavelet Transforms Lifting Scheme- Wavelet Transform Using Polyphase Matrix Factorization – Geometrical Foundations of Lifting Scheme – Lifting Scheme in Z –Domain. UNIT V APPLICATIONS 9 Wavelet methods for signal processing- Image Compression Techniques: EZW–SPHIT Coding – Image Denoising Techniques: Noise Estimation – Shrinkage Rules – Shrinkage Functions – Edge Detection and Object Isolation, Image Fusion, and Object Detection. TOTAL: 45 PERIODS OUTCOMES: Upon Completion of the course, the students will be able to • Use Fourier tools to analyse signals • Gain knowledge about MRA and representation using wavelet bases • Acquire knowledge about various wavelet transforms and design wavelet transform • Apply wavelet transform for various signal & image processing applications TEXT BOOKS: 1. Rao R M and A S Bopardikar, ― Wavelet Transforms Introduction to theory and Applications, Pearson Education, Asia, 2000. 2. L.Prasad & S.S.Iyengar, Wavelet Analysis with Applications to Image Processing, CRC Press, 1997. REFERENCES: 1. J. C. Goswami and A. K. Chan, “Fundamentals of wavelets: Theory, Algorithms and Applications" WileyInterscience Publication, John Wiley & Sons Inc., 1999. 2. M. Vetterli, J. Kovacevic, “Wavelets and subband coding" Prentice Hall Inc, 1995. 3. Stephen G. Mallat, “A wavelet tour of signal processing" 2 nd Edition Academic Press, 2000. 4. Soman K P and Ramachandran K I, ― Insight into Wavelets From Theory to practice‖ , Prentice Hall, 2004. 17 IF7301 SOFT COMPUTING LT P C 3 0 0 3 OBJECTIVES: • To learn the key aspects of Soft computing and Neural networks. • To know about the components and building block hypothesis of Genetic algorithm. • To understand the features of neural network and its applications • To study the fuzzy logic components • To gain insight onto Neuro Fuzzy modeling and control. • To gain knowledge in machine learning through Support vector machines. UNIT I INTRODUCTION TO SOFT COMPUTING 9 Evolution of Computing - Soft Computing Constituents – From Conventional AI to Computational Intelligence - Machine Learning Basics UNIT II GENETIC ALGORITHMS 9 Introduction, Building block hypothesis, working principle, Basic operators and Terminologies like individual, gene, encoding, fitness function and reproduction, Genetic modeling: Significance of Genetic operators, Inheritance operator, cross over, inversion & deletion, mutation operator, Bitwise operator, GA optimization problems, JSPP (Job Shop Scheduling Problem), TSP (Travelling Salesman Problem),Differences & similarities between GA & other traditional methods, Applications of GA. UNIT III NEURAL NETWORKS 9 Machine Learning using Neural Network, Adaptive Networks – Feed Forward Networks – Supervised Learning Neural Networks – Radial Basis Function Networks - Reinforcement Learning – Unsupervised Learning Neural Networks – Adaptive Resonance Architectures – Advances in Neural Networks. UNIT IV FUZZY LOGIC 9 Fuzzy Sets – Operations on Fuzzy Sets – Fuzzy Relations – Membership Functions-Fuzzy Rules and Fuzzy Reasoning – Fuzzy Inference Systems – Fuzzy Expert Systems – Fuzzy Decision Making UNIT V NEURO-FUZZY MODELING 9 Adaptive Neuro-Fuzzy Inference Systems – Coactive Neuro-Fuzzy Modeling – Classification and Regression Trees – Data Clustering Algorithms – Rule base Structure Identification – Neuro-Fuzzy Control – Case Studies. TOTAL : 45 PERIODS OUTCOMES • Implement machine learning through Neural networks. • Develop a Fuzzy expert system. • Model Neuro Fuzzy system for clustering and classification. • Write Genetic Algorithm to solve the optimization problem • Use Support Vector Machine for enabling the machine learning 18 REFERENCES: 1. Jyh-Shing Roger Jang, Chuen-Tsai Sun, Eiji Mizutani, “Neuro-Fuzzy and Soft Computing”, Prentice-Hall of India, 2003. 2. Kwang H.Lee, “First course on Fuzzy Theory and Applications”, Springer–Verlag Berlin Heidelberg, 2005. 3. George j. Klir and bo yuan, “fuzzy sets and fuzzy logic-theory and applications”, prentice hall, 1995. 4. james a. freeman and david m. skapura, “neural networks algorithms, applications, and programming techniques”, pearson edn., 2003. 5. david e. goldberg, “genetic algorithms in search, optimization and machine learning”, addison wesley, 2007. 6. Mitsuo gen and runwei cheng,”genetic algorithms and engineering optimization”, wiley publishers 2000. 7. mitchell melanie, “an introduction to genetic algorithm”, prentice hall, 1998. 8. S.N.Sivanandam, S.N.Deepa, “Introduction To Genetic Algorithms”, Springer, 2007. 9. Eiben And Smith “Introduction To Evolutionary Computing” Springer 10. E. Sanchez, t. Shibata, and l. A. Zadeh, eds., "genetic algorithms and fuzzy logic systems: soft computing perspectives, advances in fuzzy systems - applications and theory", vol. 7, river edge, world scientific, 1997. AP7001 COMPUTER ARCHITECTURE AND PARALLEL PROCESSING LTPC 3 003 OBJECTIVES: • To understand the difference between the pipeline and parallel concepts. • To study the various types of architectures and the importance of scalable architectures. • To study the various memories and optimization of memory . UNIT I COMPUTER DESIGN AND PERFORMANCE MEASURES 9 Fundamentals of Computer Design – Parallel and Scalable Architectures – Multiprocessors – Multivector and SIMD architectures – Multithreaded architectures – Data-flow architectures - Performance Measures UNIT II PARALLEL PROCESSING, PIPELINING AND ILP 9 Instruction Level Parallelism and Its Exploitation - Concepts and Challenges - Overcoming Data Hazards with Dynamic Scheduling – Dynamic Branch Prediction - Speculation - Multiple Issue Processors Performance and Efficiency in Advanced Multiple Issue Processors UNIT III MEMORY HIERARCHY DESIGN 9 Memory Hierarchy - Memory Technology and Optimizations – Cache memory – Optimizations of Cache Performance – Memory Protection and Virtual Memory - Design of Memory Hierarchies UNIT IV MULTIPROCESSORS 9 Symmetric and distributed shared memory architectures – Cache coherence issues - Performance Issues – Synchronization issues – Models of Memory Consistency - Interconnection networks – Buses, crossbar and multi-stage switches. 19 UNIT V MULTI-CORE ARCHITECTURES 9 Software and hardware multithreading – SMT and CMP architectures – Design issues – Case studies – Intel Multi-core architecture – SUN CMP architecture – IBM cell architecture - hp architecture. TOTAL : 45 PERIODS REFERENCES: 1. Kai Hwang, "Advanced Computer Architecture", McGraw Hill International, 2001. 2. John L. Hennessey and David A. Patterson, “Computer Architecture – A quantitative approach”, Morgan Kaufmann / Elsevier, 4th. edition, 2007. 3. William Stallings, “Computer Organization and Architecture – Designing for Performance”, Pearson Education, Seventh Edition, 2006. 4. John P. Hayes, “Computer Architecture and Organization”, McGraw Hill 5. David E. Culler, Jaswinder Pal Singh, “Parallel Computing Architecture: A hardware/ software approach”, Morgan Kaufmann / Elsevier, 1997. 6. Dimitrios Soudris, Axel Jantsch, "Scalable Multi-core Architectures: Design Methodologies and Tools", Springer, 2012 7. John P. Shen, “Modern processor design. Fundamentals of super scalar processors”, Tata McGraw Hill 2003. AP7002 THREE DIMENSIONAL NETWORKS ON CHIP LTPC 3 00 3 OBJECTIVES: • To introduce the concept of 3D NOC. • To study the architectures and protocols of 3D NOC. • To identify the types of fault and study the testing methods for fault rectification. • To learn DimDE router for 3D NOC. UNIT I INTRODUCTION TO THREE DIMENSIONAL NOC 9 Three-Dimensional Networks-on-Chips Architectures. – Resource Allocation for QoS On-Chip Communication – Networks-on-Chip Protocols-On-Chip Processor Traffic Modeling for Networks-onChip UNIT II TEST AND FAULT TOLERANCE OF NOC 9 Design-Security in Networks-on-Chips-Formal Verification of Communications in Networks-on-ChipsTest and Fault Tolerance for Networks-on-Chip Infrastructures-Monitoring Services for Networks-onChips. UNIT III ENERGY AND POWER ISSUES OF NOC 9 Energy and Power Issues in Networks-on-Chips-The CHAIN works Tool Suite: AComplete Industrial Design Flow for Networks-on-Chips UNIT IV MICRO-ARCHITECTURE OF NOC ROUTER 9 Baseline NoC Architecture – MICRO-Architecture Exploration ViChaR: A Dynamic Virtual Channel Regulator for NoC Routers- RoCo: The Row-Column Decoupled Router – A Gracefully Degrading and Energy-Efficient Modular Router Architecture for On-Chip Networks. Exploring Fault Tolerant Networks-on-Chip Architectures. 20 UNIT V DIMDE ROUTER FOR 3D NOC 9 A Novel Dimensionally-Decomposed Router for On-Chip Communication in 3D Architectures-Digest of Additional NoC MACRO-Architectural Research. TOTAL: 45 PERIODS REFERENCES: 1. Chrysostomos Nicopoulos, Vijaykrishnan Narayanan, Chita R.Das” Networks-on - Chip “ Architectures A Holistic Design Exploration”, Springer. 2. Fayezgebali, Haythamelmiligi, Hqhahed Watheq E1-Kharashi “Networks-on-Chips theory and practice CRC press. VL7201 CAD FOR VLSI CIRCUITS LTPC 3 0 03 OBJECTIVES: • To study various physical design methods in VLSI. • To understand the concepts behind the VLSI design rules and routing techniques. • To use the simulation techniques at various levels in VLSI design flow, • To understand the concepts of various algorithms used for floor planning and routing techniques. UNIT I VLSI DESIGN METHODOLOGIES 9 Introduction to VLSI Design methodologies - Review of Data structures and algorithms - Review of VLSI Design automation tools - Algorithmic Graph Theory and Computational Complexity Tractable and Intractable problems - general purpose methods for combinatorial optimization. UNIT II DESIGN RULES 9 Layout Compaction - Design rules - problem formulation - algorithms for constraint graph compaction - placement and partitioning - Circuit representation - Placement algorithms partitioning UNIT III FLOOR PLANNING 9 Floor planning concepts - shape functions and floorplan sizing - Types of local routing problems Area routing - channel routing - global routing - algorithms for global routing. UNIT IV SIMULATION 9 Simulation - Gate-level modeling and simulation - Switch-level modeling and simulation Combinational Logic Synthesis - Binary Decision Diagrams - Two Level Logic Synthesis. UNIT V MODELLING AND SYNTHESIS 9 High level Synthesis - Hardware models - Internal representation - Allocation assignment and scheduling - Simple scheduling algorithm - Assignment problem - High level transformations. TOTAL : 45 PERIODS REFERENCES: 1. S.H. Gerez, "Algorithms for VLSI Design Automation", John Wiley & Sons,2002. 2. N.A. Sherwani, "Algorithms for VLSI Physical Design Automation", Kluwer Academic Publishers, 2002. 3. Sadiq M. Sait, Habib Youssef, “VLSI Physical Design automation: Theory and Practice”, World scientific 1999 4. Steven M.Rubin, “Computer Aids for VLSI Design”, Addison Wesley Publishing 1987 21 AP7003 DIGITAL CONTROL ENGINEERING LTPC 3 0 03 OBJECTIVES: • To study the principles of PI,PD,PID controllers. • To analyse time and frequency response discrete time control system. • To familiarize and practice digital control algorithms • To implement PID control algorithms using microprocessors, microcontrollers. UNIT I PRINCIPLES OF CONTROLLERS 9 Review of frequency and time response analysis and specifications of control systems, need for controllers, continues time compensations, continues time PI, PD, PID controllers, digital PID controllers. UNIT II SIGNAL PROCESSING IN DIGITAL CONTROL 9 Sampling, time and frequency domain description, aliasing, hold operation, mathematical model of sample and hold, zero and first order hold, factors limiting the choice of sampling rate, reconstruction. UNIT III MODELING AND ANALYSIS OF SAMPLED DATA CONTROL SYSTEM 9 Difference equation description, Z-transform method of description, pulse transfer function, time and frequency response of discrete time control systems, stability of digital control systems, Jury’s stability test, state variable concepts, first companion, second companion, Jordan canonical models, discrete state variable models, elementary principles. UNIT IV DESIGN OF DIGITAL CONTROL ALGORITHMS 9 Review of principle of compensator design, Z-plane specifications, digital compensator design using frequency response plots, discrete integrator, discrete differentiator, development of digital PID controller, transfer function, design in the Z-plane. UNIT V PRACTICAL ASPECTS OF DIGITAL CONTROL ALGORITHMS 9 Algorithm development of PID control algorithms, software implementation, implementation using microprocessors and microcontrollers, finite word length effects, choice of data acquisition systems, microcontroller based temperature control systems, microcontroller based motor speed control systems. TOTAL: 45 PERIODS REFERENCES : 1. M.Gopal, "Digital Control and Static Variable Methods", Tata McGraw Hill, New Delhi, 1997. 2. John J. D’Azzo, "Constantive Houpios, Linear Control System Analysis and Design", Mc Graw Hill, 1995. 3. Kenneth J. Ayala, "The 8051 Microcontroller- Architecture, Programming and Applications", Penram International, 2nd Edition, 1996. 22 AP7004 HARDWARE - SOFTWARE CO-DESIGN LTPC 3 00 3 OBJECTIVES: • To acquire the knowledge about system specification and modeling. • To learn the formulation of partitioning • To analyze about co-synthesis. • To study the different technical aspects about prototyping and emulation. • To formulate the design specification and validate its functionality by simulation. UNIT I SYSTEM SPECIFICATION AND MODELLING 9 Embedded Systems, Hardware/Software Co-Design, Co-Design for System Specification and Modelling , Co-Design for Heterogeneous Implementation - Processor Synthe Single-Processor Architectures with one ASIC, Single-Processor Architectures with many ASICs, Multi-Processor Architectures, Comparison of Co- Design Approaches, Models of Computation ,Requirements for Embedded System Specification. UNIT II HARDWARE/SOFTWARE PARTITIONING 9 The Hardware/Software Partitioning Problem, Hardware-Software Cost Estimation, Generation of the Partitioning Graph , Formulation of the HW/SW Partitioning Problem , Optimization , HW/SW Partitioning based on Heuristic Scheduling, HW/SW Partitioning based on Genetic Algorithms . UNIT III HARDWARE/SOFTWARE CO-SYNTHESIS The Co-Synthesis Problem, State-Transition Graph, Refinement Distributed System Co-Synthesis 9 and Controller Generation, UNIT IV PROTOTYPING AND EMULATION 9 Introduction, Prototyping and Emulation Techniques , Prototyping and Emulation Environments ,Future Developments in Emulation and Prototyping ,Target Architecture- Architecture Specialization Techniques ,System Communication Infrastructure, Target Architectures and Application System Classes, Architectures for Control-Dominated Systems, Architectures for Data-Dominated Systems ,Mixed Systems and Less Specialized Systems UNIT V DESIGN SPECIFICATION AND VERIFICATION 9 Concurrency, CoordinatingConcurrent Computations, Interfacing Components, Verification ,Languages for System-Level Specification and Design System-Level Specification ,Design Representation for System Level Synthesis, System Level Specification Languages, Heterogeneous Specification and Multi-Language Co- simulation. TOTAL:45 PERIODS REFERENCES: 1. Ralf Niemann , “Hardware/Software Co-Design for Data Flow Dominated Embedded Systems”, Kluwer Academic Pub, 1998. 2. Jorgen Staunstrup, Wayne Wolf ,”Hardware/Software Co-Design: Principles and Practice” , Kluwer Academic Pub,1997. 3. Giovanni De Micheli , Rolf Ernst Morgon,” Reading in Hardware/Software Co-Design “ Kaufmann Publishers,2001. 23 AP7005 QUANTUM ELECTRONICS LTPC 3 00 3 OBJECTIVES: • To know the concepts of EM fields and wave equations. • To study the types of lasers and its characteristics. • To know the various methos of scattering. • To learn the concept of Non-linear optics. UNIT I BASIC THEOREMS AND POSTULATES OF QUANTUM MECHANICS 9 Introduction to Quantum Electronics- Résumé of electromagnetic theory-Waveguides-Planar-mirror waveguides-Modes in dielectric slab waveguides-Effective Index Method-Guided wave coupling and interference-Coupled Mode Theory-Directional coupler-Mode coupling in periodic waveguides-Mode interference-The Schrodinger wave equation, some solutions of time independent Schrodinger equation, Matrix formulation of quantum mechanics, Lattice vibration and their quantization, Electromagnetic fields and their quantization. UNIT II LASER 9 Gaussian beam in a homogenous medium, Gaussian beam in a lens waveguide, Elliptic Gaussian beams, Optical resonators, Spontaneous and induced transitions, gain coefficient, homogenous and inhomogeneous broadening, Laser oscillations, Semiconductor laser, quantum well laser, modulation of optical radiation, Q switching and Mode locking of laser, Quantum wires and dots, Laser arrays, Concept of super modes, Phase amplitude in laser, Free electron lasers. UNIT III NONLINEAR OPTICS 9 Introduction to nonlinear (NL) optics, 2nd order NL effects-The nonlinear optical susceptibility tensor, Second harmonic generation, parametric oscillations, parametric amplifiers, Applications–Nonlinear polarization –physical origin-Complex notation, conservation laws-Second Harmonic Generation, Birefringence and Quasi- Phase Matching-3rd order NL effects-Self-Phase Modulation, Optical solitonStimulated Raman Scattering-Electro-optic (EO) modulation of light-Linear EO effect, Phase retardation-Amplitude, and Phase modulation-Traveling wave modulator UNIT IV STIMULATED RAMAN AND BRILLOUIN SCATTERING 9 Stimulated Raman scattering, Antisokes scattering, stimulated Brillouin scattering, self focusing of optical beams. UNIT V NOISE Noise in laser amplifier and oscillator, Laser spectra, Measurements 9 TOTAL:45 PERIODS REFERENCES: 1. Amnon Yariv, “Quantum Electronics”, John Wiley 1989 2. Max Schubert, Bernd Wilhelmi, “Nonlinear optics and quantum electronics”, WileyInterscience 1986 3. D.Marcuse, “Principle of Quantum Electronics”, Cambridge 1980 4. David Klyshko, “Physical Foundations of Quantum Electronics” , World Scientific 2011 5. J.T. Verdeyen, “Laser Electronics”, Prentice-Hall 1995 6. Harisson Paul, “Quantum Wells, Wires and Dots”, Wiley 2011 7. G.P.Agarwal and N.K.Dutta, “Long Wavelength Semiconductor lasers”, Van Nostrand Reinhold 1986 8. A.Yariv, “Optical Electronics”, CBS College Publishing 1984 24 AP7006 SENSORS AND SIGNAL CONDITIONING LTPC 3 003 OBJECTIVES: • To know the static and dynamic characteristics of measurement systems. • To study about the various types of sensors viz. Resistive, Reactive, Self- generating. • To know the different types digital and semiconductor sensors. UNIT I INTRODUCTION TO MEASUREMENT SYSTEMS 9 Introduction to measurement systems: general concepts and terminology, measurement systems, sensor classification, general input-output configuration, methods of correction performance characteristics: static characteristics of measurement systems, accuracy, precision, sensitivity, other characteristics: linearity, resolution, systematic errors , random errors, dynamic characteristics of measurement systems: zero-order, first-order, and second-order measurement systems and response UNIT II RESISTIVE SENSORS 9 Resistive sensors: potentiometers , strain gages and types, resistive temperature detectors (rtds) , thermistors , magneto resistors, light-dependent resistors (ldrs); Signal conditioning for resistive sensors: measurement of resistance , voltage dividers , Wheatstone bridge. Balance and deflection measurements , sensor bridge calibration and compensation instrumentation amplifiers , interference types and reduction UNIT III REACTIVE SENSORS 9 Reactance variation and electromagnetic sensors : capacitive sensors – variable & differential, inductive sensors – reluctance variation, eddy current, linear variable differential transformers (lvdts) , variable transformers: synchros, resolvers, inductosyn , magneto elastic sensors, electromagnetic sensors – sensors based on faraday’s law, hall effect sensors, Signal conditioning for reactance variation sensors : problems and alternatives, ac bridges, carrier amplifiers – application to the lvdt, variable oscillators, resolver-to-digital and digital-to-resolver converters UNIT IV SELF-GENERATING SENSORS 9 Self-generating sensors: thermoelectric sensors, piezoelectric sensors, pyroelectric sensors, photovoltaic sensors , electrochemical sensors, Signal conditioning for self-generating sensors: chopper and low-drift amplifiers, offset and drifts amplifiers , electrometer amplifiers, charge amplifiers, noise in amplifiers UNIT V DIGITAL SENSORS AND SEMICONDUCTOR DEVICE SENSORS 9 Digital sensors: position encoders, variable frequency sensors – quartz digital thermometer, vibrating wire strain gages , vibrating cylinder sensors, saw sensors, digital flow meters, Sensors based on semiconductor junctions : thermometers based on semiconductor junctions, magneto diodes and magneto transistors, photodiodes and phototransistors, sensors based on mosfet transistors, chargecoupled sensors – types of CCD imaging sensors , ultrasonic-based sensors , fiber-optic sensors TOTAL: 45 PERIODS REFERENCES: 1. Ramon Pallás Areny, John G. Webster, “Sensors and Signal Conditioning”, 2nd edition, John Wiley and Sons, 2000 2. D.Patranabis, “Sensors and Transducers”, TMH 2003 3. Jon Wilson , “Sensor Technology Handbook”, Newne 2004. 4. Herman K.P. Neubrat, “Instrument Transducers – An Introduction to Their Performance and Design”, Oxford University Press. 5. E.O. Doeblin, “Measurement System : Applications and Design”, McGraw Hill Publications 25 6. D. Johnson, “Process Control Instrumentation Technology”, John Wiley and Sons 7. Kevin James, PC Interfacing and Data acquisition, Elsevier, 2011 8. Graham Brooker, Introduction to Sensors for ranging and imaging, Yesdee, 2009 9. Ian Sinclair, Sensors and Transducers, Elsevier, 3rd Edition, 2011 VL7102 VLSI DESIGN TECHNIQUES LTPC 3 0 03 OBJECTIVES: • To understand the concepts of MOS transistors operations and their AC , DC characteristics. • To know the fabrication process of cmos technology and its layout design rules • To understand the latch up problem in cmos circuits. • To study the concepts of cmos invertors and their sizing methods • To know the concepts of power estimation and delay calculations in cmos circuits. UNIT I MOS TRANSISTOR THEORY 9 NMOS and PMOS transistors, CMOS logic, MOS transistor theory – Introduction, Enhancement mode transistor action, Ideal I-V characteristics, DC transfer characteristics, Threshold voltage- Body effect- Design equations- Second order effects. MOS models and small signal AC characteristics, Simple MOS capacitance Models, Detailed MOS gate capacitance model, Detailed MOS Diffusion capacitance model UNIT II CMOS TECHNOLOGY AND DESIGN RULE 9 CMOS fabrication and Layout, CMOS technologies, P -Well process, N -Well process, twin -tub process, MOS layers stick diagrams and Layout diagram, Layout design rules, Latch up in CMOS circuits, CMOS process enhancements, Technology – related CAD issues, Fabrication and packaging. UNIT III INVERTERS AND LOGIC GATES 9 NMOS and CMOS Inverters, Inverter ratio, DC and transient characteristics , switching times, Super buffers, Driving large capacitance loads, CMOS logic structures , Transmission gates, Static CMOS design, dynamic CMOS design. UNIT IV CIRCUIT CHARACTERISATION AND PERFORMANCE ESTIMATION 9 Resistance estimation, Capacitance estimation, Inductance, switching characteristics, transistor sizing, power dissipation and design margining. Charge sharing .Scaling. UNIT V VLSI SYSTEM COMPONENTS CIRCUITS AND SYSTEM LEVEL PHYSICAL DESIGN 9 Multiplexers, Decoders, comparators, priority encoders, Shift registers. Arithmetic circuits – Ripple carry adders, Carry look ahead adders, High-speed adders, Multipliers. Physical design – Delay modelling ,cross talk, floor planning, power distribution. Clock distribution. Basics of CMOS testing. TOTAL: 45 PERIODS 26 REFERENCES: 1. Neil H.E. Weste and Kamran Eshraghian, Principles of CMOS VLSI Design, Pearson Education ASIA, 2nd edition, 2000. 2. John P.Uyemura “Introduction to VLSI Circuits and Systems”, John Wiley & Sons, Inc., 2002. 3. Eugene D.Fabricius, Introduction to VLSI Design McGraw Hill International Editions, 1990. 4. Pucknell, “Basic VLSI Design”, Prentice Hall of India Publication, 1995. 5. Wayne Wolf “Modern VLSI Design System on chip. Pearson Education.2002. VL7202 LOW POWER VLSI DESIGN LTPC 3 0 03 OBJECTIVES: • To know the sources of power consumption in cmos circuits • To understand the various power reduction techniques and the power estimation methods. • To study the design concepts of low power circuits. UNIT I POWER DISSIPATION 9 Hierarchy of limits of power – Sources of power consumption – Physics of power dissipation in CMOS FET devices – Basic principle of low power design. UNIT II POWER OPTIMIZATION 9 Logic level power optimization – Circuit level low power design – circuit techniques for reducing power consumption in adders and multipliers.8 UNIT III DESIGN OF LOW POWER CIRCUITS 9 Computer arithmetic techniques for low power system – reducing power consumption in memories – low power clock, Inter connect and layout design – Advanced techniques –Special techniques. UNIT IV POWER ESTIMATION 9 Power Estimation technique – logic power estimation – Simulation power analysis –Probabilistic power analysis. UNIT V SYNTHESIS AND SOFTWARE DESIGN Synthesis for low power – Behavioral level transform – software design for low power. 9 TOTAL: 45PERIODS REFERENCES: 1. Kaushik Roy and S.C.Prasad, “Low power CMOS VLSI circuit design”, Wiley, 2000. 2. Dimitrios Soudris, Christians Pignet, Costas Goutis, “Designing CMOS Circuits for Low Power”, Kluwer, 2002. 3. J.B.Kulo and J.H Lou, “Low voltage CMOS VLSI Circuits”, Wiley 1999. 4. A.P.Chandrasekaran and R.W.Broadersen, “Low power digital CMOS design”, Kluwer,1995. 5. Gary Yeap, “Practical low power digital VLSI design”, Kluwer, 1998. 6. Abdelatif Belaouar, Mohamed.I.Elmasry, “Low power digital VLSI design”, Kluwer, 1995. 7. James B.Kulo, Shih-Chia Lin, “Low voltage SOI CMOS VLSI devices and Circuits”, John Wiley and sons, inc. 2001. 8. Steven M.Rubin, “Computer Aids for VLSI Design”, Addison Wesley Publishing 27 AP7007 FIBER OPTIC SENSORS LTPC 3 00 3 OBJECTIVES: • To familiarize about fiber optic sensor technology. • To study about Optical resonators. • To acquire knowledge about magnetic sensors. • To know about Chemical and Biosensors. • To gain knowledge about smart structures. UNIT I SENSOR TECHNOLOGY 9 The Emergence of Fiber Optic Sensor Technology-Optical Fibers-Light Sources-Optical DetectorsOptical Modulators- Intensity-Based and Interferometric Sensors-Fabry perot, Mach Zender, Michelson and Sagnac UNIT II GRATING SENSORS 9 Multimode Grating and Polarisation Sensors-Sensors Based on Relative Movement of Opposed Gratings-Grating Period Modulation-Sensors Based on the Photoelastic Effect-Retardation PlatesFiber Grating Sensors UNIT III DISTRIBUTED AND MAGNETIC SENSORS 9 Fiber Optic Distributed and Magnetic Sensor-Distributed Sensing- Basic Principles of Sensor Multiplexing- Interferometric Sensor Multiplexing- Faraday effect sensors-Magneto strictive - Lorentz force sensors-Evanescent Field Absorption Sensors UNIT IV CHEMICAL AND BIOSENSOR 9 Fiber Optic Chemical and Biosensor: Reagent Mediated sensor-Humidity sensor – pH sensor Hydrogen sensor - CO2 sensor – Ammonia sensor - Chloride sensor – Glucose sensor – Oxygen sensor - Surface Plasmonic Resonance based sensor UNIT V APPLICATIONS 9 Industrial Applications of Fiber Optic Sensors : Temperature – Pressure - fluid level – flow – position vibration - rotation measurements - Current -voltage measurement - Chemical analysis. Introduction to smart structures - Applications –skins. TOTAL: 45PERIODS REFERENCES: 1. Eric Udd, William B. Spillman, Jr., “Fiber Optic Sensors: An Introduction for Engineers and Scientists”, John Wiley & Sons 2011 2. Bhagavānadāsa Gupta, Banshi Das Gupta, “Fiber Optic Sensors: Principles and Applications”, New India Publishing 2006 3. David A. Krohn, “Fiber optic sensors: fundamentals and applications”, ISA Publishing 2000 4. Francis T.S. Yu, Shizhuo Yin, Paul B. Ruffin, “Fiber Optic Sensors”, CRC Press Publisher 2010 5. B.Culshaw and J.Daykin, “Optic fiber Sensors Systems and Applications”, Artech House 1989 6. KTV Grattan & BT Meggit, “Optical fiber sensor technology & Applications”, Kluwer Academic 2000 28 AP7008 DSP INTEGRATED CIRCUITS LTPC 3 0 03 OBJECTIVES: • To study the procedural flow of system design in DSP and Integrated circuit. • To analyse the frequency response and transfer function of DSP systems. • To compare and study the performance of various transforms for signal processing. • To design FIR and IIR filters for the given specifications. • To study the architectures for DSP system. • To study the design layout for VLSI circuits UNIT I DSP INTEGARTED CIRCUITS AND VLSI CIRCUIT TECHNOLOGIES 9 Standard digital signal processors, Application specific IC’s for DSP, DSP systems, DSP system design, Integrated circuit design. MOS transistors, MOS logic, VLSI process technologies, Trends in CMOS technologies. UNIT II DIGITAL SIGNAL PROCESSING 9 Digital signal processing, Sampling of analog signals, Selection of sample frequency, Signal-processing systems, Frequency response, Transfer functions, Signal flow graphs, Filter structures, Adaptive DSP algorithms, DFT-The Discrete Fourier Transform, FFT-The Fast Fourier Transform Algorithm, Image coding, Discrete cosine transforms. UNIT III DIGITAL FILTERS AND FINITE WORD LENGTH EFFECTS 9 FIR filters, FIR filter structures, FIR chips, IIR filters, Specifications of IIR filters, Mapping of analog transfer functions, Mapping of analog filter structures, Multirate systems, Interpolation with an integer factor L, Sampling rate change with a ratio L/M, Multirate filters. Finite word length effects -Parasitic oscillations, Scaling of signal levels, Round-off noise, Measuring round-off noise, Coefficient sensitivity, Sensitivity and noise. UNIT IV DSP ARCHITECTURES AND SYNTHESIS OF DSP ARCHITECTURES 9 DSP system architectures, Standard DSP architecture, Ideal DSP architectures, Multiprocessors and multicomputers, Systolic and Wave front arrays, Shared memory architectures. Mapping of DSP algorithms onto hardware, Implementation based on complex PEs, Shared memory architecture with Bit – serial PEs. UNIT V ARITHMETIC UNITS AND INTEGRATED CIRCUIT DESIGN 9 Conventional number system, Redundant Number system, Residue Number System, Bit-parallel and BitSerial arithmetic, Basic shift accumulator, Reducing the memory size, Complex multipliers, Improved shift-accumulator. Layout of VLSI circuits, FFT processor, DCT processor and Interpolator as case studies. Cordic algorithm. TOTAL: 45PERIODS REFERENCES: 1. Lars Wanhammer, “DSP Integrated Circuits”, 1999 Academic press, New York 2. A.V.Oppenheim et.al, “Discrete-time Signal Processing”, Pearson Education, 2000. 3. Emmanuel C. Ifeachor, Barrie W. Jervis, “Digital signal processing – A practical approach”, Second Edition, Pearson Education, Asia. 4. Keshab K.Parhi, “VLSI Digital Signal Processing Systems design and Implementation”, John Wiley & Sons, 1999. 29 AP7009 RF SYSTEM DESIGN LTPC 3 00 3 OBJECTIVES: • To learn the importance and issues in the design of RF • To design RF filter and RF amplifier • To study about the characteristics of oscillators, mixers, PLL, wireless synthesizers and detector circuits. UNIT I RF ISSUES 9 Importance of RF design- Electromagnetic spectrum, RF behavior of passive components, chip components and circuit board considerations, scattering parameters, smith chart and applications. UNITII RF FILTER DESIGN 9 Overview, Basic resonator and filter configuration, special filter realizations, smith chart based filter design, coupled filter. UNIT III ACTIVE RF COMPONENTS AND APPLICATIONS 9 RF diodes, BJT, RF FET’S, High electron mobility transistors, matching and biasing networksimpedance matching using discrete components, microstripline matching networks, amplifier classes of operation and biasing networks. UNIT IV RF AMPLIFIER DESIGNS 9 Characteristics, amplifier power relations, stability considerations, constant gain circles, constant VSWR circles, low noise circles broadband, high power and multistage amplifiers. UNIT V OSCILLATORS, MIXERS & APPLICATIONS 9 Basic oscillator model, High Frequency oscillator configuration, basic characteristic of mixers, wireless synthesizers, phase locked loops, detector and demodulator circuits. TOTAL: 45PERIODS REFERENCES: 1. Reinhold Ludwig and Powel Bretchko, RF Circuit Design – Theory and Applications, Pearson Education Asia, First Edition, 2001. 2. Joseph. J. Carr, Secrets of RF Circuit Design , McGraw Hill Publishers, Third Edition, 2000. 3. Mathew M. Radmanesh, Radio Frequency & Microwave Electronics, Pearson Education Asia, Second Edition, 2002. 4. Ulrich L. Rohde and David P. NewKirk, RF / Microwave Circuit Design, John Wiley & Sons USA 2000. 5. Roland E. Best, Phase - Locked Loops: Design, simulation and applications, McGraw Hill Publishers 5TH edition 2003. 30 VL7001 ANALOG AND MIXED MODE VLSI DESIGN LTPC 3 00 3 OBJECTIVES: • To study the concepts of MOS large signal model and small signal model • To understand the concepts of D/A conversion methods and their architectures. • To design filters for ADC. • To study about the switched capacitor circuits. UNIT I INTRODUCTION AND BASIC MOS DEVICES 9 Challenges in analog design-Mixed signal layout issues- MOS FET structures and characteristicslarge signal model – small signal model- single stage Amplifier-Source follower- Common gate stage – Cascode Stage UNIT II SIBMICRON CIRCUIT DESIGN 9 Submicron CMOS process flow, Capacitors and resistors, Current mirrors, Digital Circuit Design, Delay Elements – Adders- OP Amp parameters and Design UNIT III DATA CONVERTERS 9 Characteristics of Sample and Hold- Digital to Analog Converters- architecture-Differential Non linearity-Integral Non linearity- Voltage Scaling-Cyclic DAC-Pipeline DAC-Analog to Digital Converters- architecture – Flash ADC-Pipeline ADC-Differential Non linearity-Integral Non linearity UNIT IV SNR IN DATA CONVERTERS 9 Overview of SNR of Data Converters- Clock Jitters- Improving Using Averaging – Decimating Filters for ADC- Band pass and High Pass Sinc Filters- Interpolating Filters for DAC UNIT V SWITCHED CAPACITOR CIRCUITS 9 Resistors, First order low pass Circuit, Switched capacitor Amplifier,Switched Capacitor Integrator. TOTAL: 45PERIODS REFERENCES: 1. Vineetha P.Gejji Analog and Mixed Mode Design - Prentice Hall, 1st Edition , 2011 2. JeyaGowri Analog and Mixed Mode Design- Sapna publishing House 2011 VL7006 ANALOG VLSI DESIGN LT PC 3 0 0 3 OBJECTIVES: • To study the concepts of CMOS and BICMOS analog circuits. • To understand the concepts of A/Dconvertors and analog integrated sensors. • To understand the testing concepts in analog vlsi circuits and its statistical modeling UNIT I BASIC CMOS CIRCUIT TECHNIQUES, CONTINUOUS TIME AND LOW VOLTAGESIGNAL PROCESSING 9 Mixed-Signal VLSI Chips-Basic CMOS Circuits-Basic Gain Stage-Gain Boosting Techniques-Super MOS TransistorPrimitive Analog Cells-Linear Voltage-Current Converters-MOS Multipliers and Resistors-CMOS, Bipolar and Low-Voltage BiCMOS Op- Amp Design-Instrumentation Amplifier Design-Low Voltage Filters. 31 UNIT II BASIC BICMOS CIRCUIT TECHNIQUES, CURRENT -MODE SIGNAL PROCESSING AND NEURAL INFORMATION PROCESSING 9 Continuous-Time Signal Processing-Sampled-Data Signal Processing-Switched-Current Data Converters-Practical Considerations in SI Circuits Biologically-Inspired Neural Networks Floating - Gate, Low-Power Neural Networks-CMOS Technology and Models- Design Methodology-Networks-Contrast Sensitive Silicon Retina. UNIT III SAMPLED-DATA ANALOG FILTERS, OVER SAMPLED A/D CONVERTERS AND ANALOG INTEGRATED SENSORS 9 First-order and Second SC Circuits-Bilinear Transformation - Cascade Design-SwitchedCapacitor Ladder Filter-Synthesis of Switched-Current Filter- Nyquist rate A/D ConvertersModulators for Over sampled A/D Conversion-First and Second Order and Multibit Sigma- Delta Modulators-Interpolative Modulators –Cascaded Architecture-Decimation Filtersmechanical, Thermal, Humidity and Magnetic Sensors-Sensor Interfaces. UNIT IV DESIGN FOR TESTABILITY AND ANALOG VLSI INTERCONNECTS 9 Fault modelling and Simulation - Testability-Analysis Technique-Ad Hoc Methods and General Guidelines-Scan Techniques-Boundary Scan-Built-in Self Test-Analog Test Buses- Design for Electron -Beam Testablity-Physics of Interconnects in VLSI-Scaling of Interconnects-A Model for Estimating Wiring Density-A Configurable Architecture for Prototyping Analog Circuits. UNIT V STATISTICAL MODELING AND SIMULATION, ANALOG COMPUTERAIDED DESIGN AND ANALOG AND MIXED ANALOG-DIGITAL LAYOUT 9 Review of Statistical Concepts - Statistical Device Modeling- Statistical Circuit SimulationAutomation Analog Circuit Design-automatic Analog Layout-CMOS Transistor Layout- Resistor Layout-Capacitor Layout-Analog Cell Layout-Mixed Analog -Digital Layout. TOTAL : 45 PERIODS REFERENCES: 1. Mohammed Ismail, Terri Fief, “Analog VLSI signal and Information Processing ", McGraw- Hill International Editons, 1994. 2. Malcom R.Haskard, Lan C.May, “Analog VLSI Design - NMOS and CMOS ", Prentice Hall, 1998. 3. Randall L Geiger, Phillip E. Allen, " Noel K.Strader, VLSI Design Techniques for Analog and Digital Circuits ", Mc Graw Hill International Company, 1990. 4. Jose E.France, Yannis Tsividis, “Design of Analog-Digital VLSI Circuits for Telecommunication and signal Processing ", Prentice Hall, 1994 VL7005 PHYSICAL DESIGN OF VLSI CIRCUITS LT PC 3 0 0 3 OBJECTIVES: To introduce the physical design concepts such as routing, placement, partitioning and packaging and to study the performance of circuits layout designs, compaction techniques. UNIT I INTRODUCTION TO VLSI TECHNOLOGY 9 Layout Rules-Circuit abstraction Cell generation using programmable logic array transistor chaining, Wein Berger arrays and gate matrices-layout of standard cells gate arrays and sea of gates, field programmable gate array(FPGA)-layout methodologies Packaging-Computational ComplexityAlgorithmic Paradigms 32 UNIT II PLACEMENT USING TOP-DOWN APPROACH 9 Partitioning: Approximation of Hyper Graphs with Graphs, Kernighan-Lin HeuristicRatiocut- partition with capacity and i/o constrants.Floor planning: Rectangular dual floor planning- hierarchial approachsimulated annealing- Floor plan sizing Placement: Cost function- force directed method- placement by simulated annealing partitioning placement- module placement on a resistive network – regular placementlinear placement. UNIT III ROUTING USING TOP DOWN APPROACH 9 Fundamentals: Maze Running- line searching- Steiner trees Global Routing: Sequential Approacheshierarchial approaches- multicommodity flow based techniques- Randomised Routing- One Step approach- Integer Linear Programming Detailed Routing: Channel Routing- Switch box routing.Routing in FPGA: Array based FPGA- Row based FPGAs UNIT IV PERFORMANCE ISSUES IN CIRCUIT LAYOUT 9 Delay Models: Gate Delay Models- Models for interconnected Delay- Delay in RC trees. Timing – Driven Placement: Zero Stack Algorithm- Weight based placement- Linear Programming Approach Timing riving Routing: Delay Minimization- Click Skew Problem- Buffered Clock Trees. Minimization: constrained via Minimization unconstrained via Minimization- Other issues in minimization UNIT V SINGLE LAYER ROUTING,CELL GENERATION AND COMPACTION 9 Planar subset problem(PSP)- Single Layer Global Routing- Single Layer detailed Routing- Wire length and bend minimization technique – Over The Cell (OTC) Routing Multiple chip modules(MCM)programmable Logic Arrays- Transistor chaining- Wein Burger Arrays- Gate matrix layout- 1D compaction- 2D compaction. TOTAL: 45PERIODS REFERENCES: 1. Sarafzadeh, C.K. Wong, “An Introduction to VLSI Physical Design”, Mc Graw Hill International Edition 1995 2. Preas M. Lorenzatti, “ Physical Design and Automation of VLSI systems”, The Benjamin Cummins Publishers, 1998. VL7101 VLSI SIGNAL PROCESSING L T PC 3 0 0 3 OBJECTIVES: • To understand the various VLSI architectures for digital signal processing. • To know the techniques of critical path and algorithmic strength reduction in the filter structures. • To study the performance parameters, viz. area, speed and power. OUTCOMES: • • • • To be able to design architectures for DSP algorithms. To be able to optimize design in terms of area, speed and power. To be able to incorporate pipeline based architectures in the design. To be able to carry out HDL simulation of various DSP algorithms. 33 UNIT I INTRODUCTION 6 Overview of DSP – FPGA Technology – DSP Technology requirements – Design Implementation. UNIT II METHODS OF CRITICAL PATH REDUCTION 12 Binary Adders – Binary Multipliers – Multiply-Accumulator (MAC) and sum of product (SOP) – Pipelining and parallel processing – retiming – unfolding – systolic architecture design. UNIT III ALGORITHMIC STRENGTH REDUCTION METHODS AND RECURSIVE FILTER DESIGN 9 Fast convolution-pipelined and parallel processing of recursive and adaptive filters – fast IIR filters design. UNIT IV DESIGN OF PIPELINED DIGITAL FILTERS 9 Designing FIR filters – Digital lattice filter structures – bit level arithmetic architecture – redundant arithmetic – scaling and round-off noise. UNIT V SYNCHRONOUS ASYNCHRONOUS PIPELINING AND PROGRAMMABLE DSP 9 Numeric strength reduction – synchronous – wave and asynchronous pipelines – low power design – programmable DSPs – DSP architectural features/alternatives for high performance and low power. TOTAL: 45 PERIODS REFERENCES: 1. Keshab K.Parhi, “VLSI Digital Signal Processing Systems, Design and Implementation”, John Wiley, Indian Reprint, 2007. 2. U. Meyer – Baese, "Digital Signal Processing with Field Programmable Arrays", Springer, Second Edition, Indian Reprint, 2007. 3. S.Y.Kuang, H.J. White house, T. Kailath, “VLSI and Modern Signal Processing”, Prentice Hall, 1995. AP7010 DATA CONVERTERS L T PC 3 0 0 3 OBJECTIVES: • To study the A/D and D/A architectures • To study the importance of sample and hold circuits in A/D and D/A conversion techniques. UNIT I SAMPLE AND HOLD CIRCUITS 9 Sampling switches, Conventional open loop and closed loop sample and hold architecture, Open loop architecture with miller compensation, multiplexed input architectures, recycling architecture switched capacitor architecture. UNIT II SWITCHED CAPACITOR CIRCUITS AND COMPARATORS 9 Switched-capacitor amplifiers, switched capacitor integrator, switched capacitor common mode feedback. Single stage amplifier as comparator, cascaded amplifier stages as comparator, latched comparators. 34 UNIT III DIGITAL TO ANALOG CONVERSION 9 Performance metrics, reference multiplication and division, switching and logic functions in DAC, Resistor ladder DAC architecture, current steering DAC architecture. UNIT IV ANALOG TO DIGITAL CONVERSION 9 Performance metric, Flash architecture, Pipelined Architecture, Successive approximation architecture, Time interleaved architecture. UNIT V PRECISION TECHNIQUES 9 Comparator offset cancellation, Op Amp offset cancellation, Calibration techniques, range overlap and digital correction. TOTAL: 45PERIODS REFERENCE: 1. Behzad Razavi, “Principles of data conversion system design”, S. Chand and company Ltd, 2000. VL7103 SOLID STATE DEVICE MODELING AND SIMULATION LTPC 300 3 OBJECTIVE: • To acquaint the students with fundamentals of building device and circuit simulators, and efficient use of simulators. UNIT I MOSFET DEVICE PHYSICS 9 MOSFET capacitor, Basic operation, Basic modeling, Advanced MOSFET modeling, RF modeling of MOS transistors, Equivalent circuit representation of MOS transistor, Highfrequency behavior of MOS transistor and A.C small signal modeling, model parameter extraction, modeling parasitic BJT, Resistors, Capacitors, Inductors. UNIT II DEVICE MODELLING 9 Prime importance of circuit and device simulations in VLSI; Nodal, mesh, modified nodal and hybrid analysis equations. Solution of network equations: Sparse matrix techniques, solution of nonlinear networks through Newton-Raphson technique, convergence and stability. UNIT III MULTISTEP METHODS: 9 Solution of stiff systems of equations, adaptation of multistep methods to the solution of electrical networks, general purpose circuit simulators. UNIT IV MATHEMATICAL TECHNIQUES FOR DEVICE SIMULATIONS: 9 Poisson equation, continuity equation, drift-diffusion equation, Schrodinger equation, hydrodynamic equations, trap rate, finite difference solutions to these equations in 1D and 2D space, grid generation. UNIT V SIMULATION OF DEVICES 9 Computation of characteristics of simple devices like p-n junction, MOS capacitor and MOSFET; Small-signal analysis. TOTAL: 45PERIODS 35 REFERENCES: 1. Arora, N., “MOSFET Models for VLSI Circuit Simulation”, Springer-Verlag, 1993 2. Selberherr, S., “Analysis and Simulation of Semiconductor Devices”, Springer-Verlag., 1984 3. Fjeldly, T., Yetterdal, T. and Shur, M., “Introduction to Device Modeling and Circuit Simulation”, Wiley-Interscience., 1997 4. Grasser, T., “Advanced Device Modeling and Simulation”, World Scientific Publishing Company., 2003 5. Chua, L.O. and Lin, P.M., “Computer-Aided Analysis of Electronic Circuits: Algorithms and Computational Techniques”, Prentice-Hall., 1975 6. Trond Ytterdal, Yuhua Cheng and Tor A. Fjeldly Wayne Wolf, “Device Modeling for Analog and RF CMOS Circuit Design”, John Wiley & Sons Ltd. NC7101 HIGH PERFORMANCE NETWORKS LTPC 3 00 3 OBJECTIVES: • To develop a comprehensive understanding of multimedia networking. • To study the types of VPN and tunneling protocols for security. • To learn about network security in many layers and network management. UNIT I INTRODUCTION 9 Review of OSI, TCP/IP; Multiplexing, Modes of Communication, Switching, Routing. SONET – DWDM – DSL – ISDN – BISDN,ATM. UNIT II MULTIMEDIA NETWORKING APPLICATIONS 9 Streaming stored Audio and Video – Best effort service – protocols for real time interactive applications – Beyond best effort – scheduling and policing mechanism – integrated services – RSVP- differentiated services. UNIT III ADVANCED NETWORKS CONCEPTS 9 VPN-Remote-Access VPN, site-to-site VPN, Tunneling to PPP, Security in VPN.MPLS- operation, Routing, Tunneling and use of FEC, Traffic Engineering, MPLS based VPN, overlay networksP2P connections. UNIT IV TRAFFIC MODELLING 9 Little’s theorem, Need for modeling , Poisson modeling and its failure, Non- poisson models, Network performance evaluation. UNIT V NETWORK SECURITY AND MANAGEMENT 9 Principles of cryptography – Authentication – integrity – key distribution and certification – Access control and: fire walls – attacks and counter measures – security in many layers. Infrastructure for network management – The internet standard management framework – SMI, MIB, SNMP, Security and administration – ASN.1 TOTAL: 45PERIODS 36 REFERENCES: 1. J.F. Kurose & K.W. Ross,”Computer Networking- A top down approach featuring the internet”, Pearson, 2nd edition, 2003. 2. Walrand .J. Varatya, High performance communication network, Morgan Kauffman – Harcourt Asia Pvt. Ltd. 2nd Edition, 2000. 3. LEOM-GarCIA, WIDJAJA, “Communication networks”, TMH seventh reprint 2002. 4. Aunurag kumar, D. M Anjunath, Joy kuri, “Communication Networking”, Morgan Kaufmann Publishers, 1ed 2004. 5. Hersent Gurle & petit, “IP Telephony, packet Pored Multimedia communication Systems”, Pearson education 2003. 6. Fred Halsall and Lingana Gouda Kulkarni,”Computer Networking and the Internet” fifth edition, Pearson education 2006 7 Nader F.Mir ,Computer and Communication Networks, first edition 2010 8. Larry l.Peterson & Bruce S.David, “Computer Networks: A System Approach”- 1996. VL7301 TESTING OF VLSI CIRCUITS L T PC 3 0 0 3 OBJECTIVES: • To know the various types of faults and also to study about fault detection, dominance • To know the concepts of the test generation methods-DFT-BIST. • To understand the fault diagnosis methods. UNIT I TESTING AND FAULT MODELLING 9 Introduction to testing – Faults in Digital Circuits – Modelling of faults – Logical Fault Models – Fault detection – Fault Location – Fault dominance – Logic simulation – Types of simulation – Delay models – Gate Level Event – driven simulation. UNIT II TEST GENERATION 9 Test generation for combinational logic circuits – Testable combinational logic circuit design – Test generation for sequential circuits – design of testable sequential circuits. UNIT III DESIGN FOR TESTABILITY 9 Design for Testability – Ad-hoc design – generic scan based design – classical scan based design – system level DFT approaches. UNIT IV SELF – TEST AND TEST ALGORITHMS 9 Built-In self Test – test pattern generation for BIST – Circular BIST – BIST Architectures – Testable Memory Design – Test Algorithms – Test generation for Embedded RAMs. UNIT V FAULT DIAGNOSIS 9 Logical Level Diagnosis – Diagnosis by UUT reduction – Fault Diagnosis for Combinational Circuits – Self-checking design – System Level Diagnosis. TOTAL: 45 PERIODS 37 REFERENCES: 1. M.Abramovici, M.A.Breuer and A.D. Friedman, “Digital systems and Testable Design”, Jaico Publishing House,2002. 2. P.K. Lala, “Digital Circuit Testing and Testability”, Academic Press, 2002. 3. M.L.Bushnell and V.D.Agrawal, “Essentials of Electronic Testing for Digital, Memory and MixedSignal VLSI Circuits”, Kluwer Academic Publishers, 2002. 4. A.L.Crouch, “Design Test for Digital IC’s and Embedded Core Systems”, Prentice Hall International, 2002. VL7013 VLSI FOR WIRELESS COMMUNICATION L T PC 3 0 0 3 OBJECTIVES: • To study the design concepts of low noise amplifiers. • To study the various types of mixers designed for wireless communication. • To study and design PLL and VCO. • To understand the concepts of CDMA in wireless communication. UNIT I COMPONENTS AND DEVICES 9 Integrated inductors, resistors, MOSFET and BJT AMPLIFIER DESIGN: Low Noise Amplifier Design - Wideband LNA - Design Narrowband LNA - Impedance Matching - Automatic Gain Control Amplifiers – Power Amplifiers UNIT II MIXERS 9 Balancing Mixer - Qualitative Description of the Gilbert Mixer - Conversion Gain – Distortion - Low Frequency Case: Analysis of Gilbert Mixer – Distortion - High-Frequency Case – Noise - A Complete Active Mixer. Switching Mixer - Distortion in Unbalanced Switching Mixer - Conversion Gain in Unbalanced Switching Mixer - Noise in Unbalanced Switching Mixer - A Practical Unbalanced Switching Mixer. Sampling Mixer - Conversion Gain in Single Ended Sampling Mixer - Distortion in Single Ended Sampling Mixer - Intrinsic Noise in Single Ended Sampling Mixer - Extrinsic Noise in Single Ended Sampling Mixer. UNIT III FREQUENCY SYNTHESIZERS 9 Phase Locked Loops - Voltage Controlled Oscillators - Phase Detector – Analog Phase Detectors – Digital Phase Detectors - Frequency Dividers - LC Oscillators - Ring Oscillators - Phase Noise - A Complete Synthesizer Design Example (DECT Application). UNIT IV SUB SYSTEMS Data converters in communications, adaptive Filters, equalizers and transceivers 9 UNIT V IMPLEMENTATIONS 9 VLSI architecture for Multitier Wireless System - Hardware Design Issues for a Next generation CDMA System. TOTAL: 45PERIODS 38 REFERENCES: 1. B.Razavi ,”RF Microelectronics” , Prentice-Hall ,1998. 2. Bosco H Leung “VLSI for Wireless Communication”, Pearson Education, 2002. 3. Thomas H.Lee, “The Design of CMOS Radio –Frequency Integrated Circuits’, Cambridge University Press ,2003. 4. Emad N Farag and Mohamed I Elmasry, “Mixed Signal VLSI Wireless Design - Circuits and Systems”, Kluwer Academic Publishers, 2000. 5. Behzad Razavi, “Design of Analog CMOS Integrated Circuits” McGraw-Hill, 1999. 6. J. Crols and M. Steyaert, “CMOS Wireless Transceiver Design,” Boston, Kluwer Academic Pub., 1997. AP7011 PHOTONICS L T PC 3 0 0 3 OBJECTIVES: • To gain knowledge about light and its propagation. • To study the different types of laser and its effects. • To learn about holography. • To study the non-linear optic devices. UNIT I INTRODUCTION TO PHOTONICS 9 Nature of Light – Wave and light terminology, Maxwell equation, light spectra and sources, absorption and emission, black body radiation. Geometric Optics – Light as a ray, law of reflection including plane mirrors, law of refraction including optical fiber applications, prisms and thin lenses including Lensmaker’s equation, Lens problems and optical instruments using the thin lens equation. UNIT II WAVE OPTICS 9 Wave descriptive terminology, wave superposition (interference) including double – slit interference, diffraction and diffraction gratings, interference applications, eg. Michelson, Mach Zender and Fabry Perot interferometers, Thin film interference and Fiber Bragg Gratings. Diffraction Effects including: airy disk, near far field effects. Polarization principles including scattering, reflection and birefringence. UNIT III LASERS 9 Introduction to Lasers – Basic terminology and theory of operation including specific requirements, principal types of lasers. Laser radiation hazards including effects on the eye and skin. Laser safety standards and hazard classifications. Laser safety precautions and protective measures UNIT IV HOLOGRAPHY 9 Holography – Theory and basic principles, Requirement to record and reconstruct holograms – Experimental techniques- Recording Materials-Reflection holography and applications-Holographic interoferrometry-Nondestructive testing, optical memory." UNIT V NON-LINEAR OPTICS 9 Non-linear optics – Harmonic Generation, sum and difference frequency generation, wave mixing, Optical Parametric Oscillator. Non-linear optic materials – inorganic and organic. Phase matching, efficiency of harmonic generation- powder and single crystal methods. Methods of determination of harmonic coefficients – Z-scan and Electrical Field Induced Second Harmonic. Phase conjugationSilicon Photonics-Silicon on Insulator Photonics-Fabrication of Silicon Waveguides" TOTAL: 45 PERIODS 39 REFERENCES: 1. Bahaa E. A. Saleh, Malvin Carl Teich, “Fundamentals of Photonics”, John Wiley & Sons 2011 2. T.P. Pearsall, “Photonics Essentials: An introduction with experiments”, McGraw Hill 2003 3. F.G. Smit and T.A. King, “Optics and Photonics: An introduction”, Wiley & Sons, Ltd 2003 4. B. Balkrishna Laud, “Lasers and Non-Linear Optics”, New Age International 2011 5. R.S. Quimby, “Photonics and Lasers-An Introduction”, Wiley 2006 6. R. Menzel, “Photonics”, Springer-Verlag 2007 7. F.A. Jenkins and H.E. White, “Fundamentals of Optics”, McGraw Hill 1976 8. Yariv Yeh and Pochi Yeh, “Photonics – Optical Electronics in Modern Communications”, 6th Eition, Oxford University Press 2012 9. Abdul Al-Azzawi, “Photonics: Principles and Practices”, CRC Press 2007 10. Graham T. Reed, Andrew P. Knights, “Silicon Photonics: An Introduction”, John Wiley & Sons 2004. AP7012 NANO ELECTRONICS L T PC 3 0 0 3 OBJECTIVES: • To learn and understand basic concepts of Nano electronics. • To know the techniques of fabrication and measurement. • To gain knowledge about Nanostructure devices and logic devices. UNIT I INTRODUCTION TO NANOELECTRONICS 9 Microelectronics towards biomolecule electronics-Particles and waves- Wave-particle duality- Wave mechanics- Schrödinger wave equation- Wave mechanics of particles: - Atoms and atomic orbitalsMaterials for nanoelectronics- Semiconductors- Crystal lattices: Bonding in crystals- Electron energy bands- Semiconductor heterostructures- Lattice-matched and pseudomorphic heterostructuresInorganic-organic heterostructures- Carbon nanomaterials: nanotubes and fullerenes UNIT II FABRICATION AND MEASUREMENT TECHNIQUES 9 Growth, fabrication, and measurement techniques for nanostructures- Bulk crystal and heterostructure growth- Nanolithography, etching, and other means for fabrication of nanostructures and nanodevices- Techniques for characterization of nanostructures- Spontaneous formation and ordering of nanostructures- Clusters and nanocrystals- Methods of nanotube growth- Chemical and biological methods for nanoscale fabrication- Fabrication of nano-electromechanical systems UNIT III PROPERTIES 9 Dielectrics-Ferroelectrics-Electronic Properties and Quantum Effects-Magnetoelectronics – Magnetism and Magnetotransport in Layered Structures-Organic Molecules – Electronic Structures, Properties, and Reactions-Neurons – The Molecular Basis of their Electrical Excitability-Circuit and System Design- Analysis by Diffraction and Fluorescence Methods-Scanning Probe Techniques UNIT IV NANO STRUCTURE DEVICES 9 Electron transport in semiconductors and nanostructures- Time and length scales of the electrons in solids- Statistics of the electrons in solids and nanostructures- Density of states of electrons in nanostructures- Electron transport in nanostructures-Electrons in traditional low-dimensional structures- Electrons in quantum wells- Electrons in quantum wires- Electrons in quantum dotsNanostructure devices- Resonant-tunneling diodes- Field-effect transistors- Single-electron-transfer devices- Potential-effect transistors- Light-emitting diodes and lasers- Nano-electromechanical system devices- Quantum-dot cellular automata 40 UNIT V LOGIC DEVICES AND APPLICATIONS 9 Logic Devices-Silicon MOSFETs-Ferroelectric Field Effect Transistors-Quantum Transport Devices Based on Resonant Tunneling-Single-Electron Devices for Logic Applications-Superconductor Digital Electronics-Quantum Computing Using Superconductors-Carbon Nanotubes for Data ProcessingMolecular Electronics TOTAL: 45PERIODS REFERENCES: 1. Vladimir V. Mitin, Viatcheslav A. Kochelap, Michael A. Stroscio, “Introduction to Nanoelectronics: Science, Nanotechnology, Engineering, and Applications”, Cambridge University Press 2011 2. Supriyo Datta,“Lessons from Nanoelectronics: A New Perspective on Transport”, World Scientific 2012 3. George W. Hanson,“Fundamentals of Nanoelectronics”, Pearson 2009 4. Korkin, Anatoli; Rosei, Federico (Eds.), “Nanoelectronics and Photonics”,Springer 2008 5. Mircea Dragoman, Daniela Dragoman, “Nanoelectronics: principles and devices”, CRC Press 2006 6. Karl Goser, Peter Glösekötter, Jan Dienstuhl,“Nanoelectronics and Nanosystems: From Transistors to Molecular and Quantum Devices“, Springer 2004 7. W. R. Fahrner, Nanotechnology and Nan electronics: Materials, Devices, Measurement Techniques (SpringerVerlag Berlin Heidelberg 2005) 8. Mark A. Reed, Takhee Lee,“Molecular nanoelectronics”, American Scientific Publishers 2003 9. Jaap Hoekstra, “Introduction to Nanoelectronic Single-Electron Circuit Design”, Pan Stanford Publishing 2010 10. W. Ranier, “Nano Electronics and Information Technology”, John Wiley & Sons 2012 AP7013 PATTERN RECOGNITION LTPC 3 00 3 OBJECTIVES: • To know about Supervised and unsupervised Learning. • To study about feature extraction and structural pattern recognition. • To explore different classification models. • To understand Fuzzy Pattern Classifiers and Perception. UNIT I PATTERN CLASSIFIER 9 Overview of Pattern recognition – Discriminant functions – Supervised learning – Parametric estimation – Maximum Likelihood Estimation – Bayesian parameter Estimation – Problems with Bayes approach– Pattern classification by distance functions – Minimum distance pattern classifier. UNIT II CLUSTERING 9 Clustering for unsupervised learning and classification – Clustering concept – C Means algorithm – Hierarchical clustering – Graph theoretic approach to pattern Clustering – Validity of Clusters. UINT III FEATURE EXTRACTION AND STRUCTURAL PATTERN RECOGNITION 9 KL Transforms – Feature selection through functional approximation – Binary selection -Elements of formal grammars - Syntactic description - Stochastic grammars - Structural representation. . UNIT IV HIDDEN MARKOV MODELS AND SUPPORT VECTOR MACHINE 9 State Machines – Hidden Markov Models – Training – Classification – Support vector Machine – Feature Selection. 41 UNIT V RECENT ADVANCES 9 Fuzzy logic – Fuzzy Pattern Classifiers – Pattern Classification using Genetic Algorithms – Case Study Using Fuzzy Pattern Classifiers and Perception. TOTAL: 45 PERIODS OUTCOMES: Upon Completion of the course, the students will be able to • Classify the data and identify the patterns. • Extract feature set and select the features from given data set. REFERENCES: 1. M. Narasimha Murthy and V. Susheela Devi, “Pattern Recognition”, Springer 2011. 2. S.Theodoridis and K.Koutroumbas, “Pattern Recognition”, 4th Ed., Academic Press, 2009. 3. Robert J.Schalkoff, “Pattern Recognition Statistical, Structural and Neural Approaches”, John Wiley & Sons Inc., New York, 1992. 4. C.M.Bishop, “Pattern Recognition and Machine Learning”, Springer, 2006. 5. R.O.Duda, P.E.Hart and D.G.Stork, “Pattern Classification”, John Wiley, 2001 6. Andrew Webb, “Stastical Pattern Recognition”, Arnold publishers, London,1999. AP7014 OPTICAL COMPUTING LTPC 3 00 3 OBJECTIVES: • To know the basic pricinciples of optical computing. • To study about various optical computing elements. • To study and compare analog and digital optical computing. UNIT I OPTICAL COMPUTING PRINCIPLES 9 Non Von-Neuman architecture, various forms of parallel processing, SLM, LEDs, Lasers and Photo detectors arrays, Holographic techniques, Optical storage devices. UNIT II DIGITAL LOGIC 9 Symbolic substitution, Image computing, Cellular logic, Boolean logic, Cellular arrays, Cellular hyper cubes, conventional hyper cube, Binary stack coded arithmetic, Binary Row coded, Binary symbol, Coded arithmetic multilevel logic processing. UNIT III OPTICAL COMPUTING ELEMENTS 9 ß switches, Machzender interferometeric logic elements for Boolean functions, Acousto optic; optical matrix multipliers, Non linear optical switches as memories. UNIT IV ANALOG OPTICAL COMPUTING Linear optic processing, Analog optical arithmatics. Recognition by analog optical system. 9 UNIT V DIGITAL OPTICAL COMPUTING 9 Devices, Shadow casting, Symbolic substitution, Optical matrix processing, Optical linear neural network. Nonlinear network. TOTAL: 45PERIODS 42 REFERENCES: 1. A.Karim Mohammed and A.S.Abdul Awwall, Optical computing-An introduction, John Wiley, New York, 1992. 2. Mc. Aulay Alastair.D, Optical Computer Architecture: The Application of optical concepts to next generation computers, John Wiley, New York, 1991. 3. Dror Feitelsen, Optical Computing, MIT press, Cambridge, 1988. CP7030 ROBOTICS L 3 T 0 P 0 OBJECTIVES: • To understand robot locomotion and mobile robot kinematics • To understand perception in robotics • To understand mobile robot localization • To understand mobile robot mapping • To understand simultaneous localization and mapping (SLAM) • To understand robot planning and navigation UNIT I LOCOMOTION AND KINEMATICS 9 Introduction to Robotics – key issues in robot locomotion – legged robots – wheeled mobile robots – aerial mobile robots – introduction to kinematics – kinematics models and constraints – robot maneuverability UNIT II ROBOT PERCEPTION 9 Sensors for mobile robots – vision for robotics – cameras – image formation – structure from stereo – structure from motion – optical flow – color tracking – place recognition – range data UNIT III MOBILE ROBOT LOCALIZATION 9 Introduction to localization – challenges in localization – localization and navigation – belief representation – map representation – probabilistic map-based localization – Markov localization – EKF localization – UKF localization – Grid localization – Monte Carlo localization – localization in dynamic environments UNIT IV MOBILE ROBOT MAPPING 9 Autonomous map building – occupancy grip mapping – MAP occupancy mapping – SLAM – extended Kalman Filter SLAM – graph-based SLAM – particle filter SLAM – sparse extended information filter – fastSLAM algorithm UNIT V PLANNING AND NAVIGATION 9 Introduction to planning and navigation – planning and reacting – path planning – obstacle avoidance techniques – navigation architectures – basic exploration algorithms TOTAL: 45 PERIODS OUTCOMES: Upon Completion of the course, the students will be able to • Explain robot locomotion • Apply kinematics models and constraints • Implement vision algorithms for robotics • Implement robot localization techniques • Implement robot mapping techniques • Implement SLAM algorithms • Explain planning and navigation in robotics 43 C 3 REFERENCES: 1. Roland Seigwart, Illah Reza Nourbakhsh, and Davide Scaramuzza, “Introduction to autonomous mobile robots”, Second Edition, MIT Press, 2011. 2. Sebastian Thrun, Wolfram Burgard, and Dieter Fox, “Probabilistic Robotics”, MIT Press, 2005. 3. Howie Choset et al., “Principles of Robot Motion: Theory, Algorithms, and Implementations”, A Bradford Book, 2005. 4. Gregory Dudek and Michael Jenkin, “Computational Principles of Mobile Robotics”, Second Edition, Cambridge University Press, 2010. 5. Maja J. Mataric, “The Robotics Primer”, MIT Press, 2007. AP7015 OPTICAL IMAGING TECHNIQUES LTPC 3 00 3 OBJECTIVES: • To learn the fundamentals of optical image formation and fourier optics. • To study and compare coherent and incoherent optical imaging. • To know the various techniques in the construction of image. UNIT I FUNDAMENTALS 9 Coherance and light source – optical image formation – Franhoufer diffraction – Single slit – double slit circular aperture – double aperture gratings – 1D and 2D lens aperture – Interference. UNIT II FOURIER SERIES AND TRANSFORM 9 Fourier series – Fourier coefficients – optical and crystal diffraction gratings – Fourier series formulation – Fourier transform and single slit diffraction – grating pattern – Fourier transform of light waves – correlation. UNIT III OPTICAL IMAGING AND PROCESSING 9 Incoherent optical imaging – transfer function – coherent optical imaging – periodic and non periodic objects – optical transform – Holography – coherent and incoherent optical processing. UNIT IV IMAGE CONSTRUCTION TECHNIQUES 9 X – ray computed tomography – reconstruction by simple back projection – iterative reconstruction – analysis methods – magnetic resonance imaging – Ultrasonic computed tomography. UNIT V APPLICATIONS 9 Michelsons stellar interferometry – spectral interferometer – fringe visibility and spectral distribution – partial coherence and correlation – Fourier transform spectroscopy – Synthetic aperture radar – Intensity interferometer – Imaging by holographic techniques. TOTAL: 45 PERIODS . REFERENCES: 1. E.G. Stewart, “Fourier Optics an Introduction”, 2nd Edition, Ellis Harwood limited, Chichester, 1987. 2. Dror.G. Feitelson, “Optical Computing”, MIT press, Cambridge, 1988. 44 CU7002 MEMS AND NEMS L T P C 3 0 0 3 OBJECTIVES: • To introducing the concepts of microelectromechanical devices. • To know the fabrication process of Microsystems. • To know the design concepts of micro sensors and micro actuators. • To introducing concepts of quantum mechanics and nano systems. UNIT I OVERVIEW AND INTRODUCTION 9 New trends in Engineering and Science: Micro and Nanoscale systems Introduction to Design of MEMS and NEMS, Overview of Nano and Microelectromechanical Systems, Applications of Micro and Nanoelectromechanical systems, Microelectromechanical systems, devices and structures Definitions, Materials for MEMS: Silicon, silicon compounds, polymers, metals UNIT II MEMS FABRICATION TECHNOLOGIES 9 Microsystem fabrication processes: Photolithography, Ion Implantation, Diffusion, Oxidation. Thin film depositions: LPCVD, Sputtering, Evaporation, Electroplating; Etching techniques: Dry and wet etching, electrochemical etching; Micromachining: Bulk Micromachining, Surface Micromachining, High AspectRatio (LIGA and LIGA-like) Technology; Packaging: Microsystems packaging, Essential packaging technologies, Selection of packaging materials UNIT III MICRO SENSORS 9 MEMS Sensors: Design of Acoustic wave sensors, resonant sensor, Vibratory gyroscope, Capacitive and Piezo Resistive Pressure sensors- engineering mechanics behind these Microsensors. Case study: Piezo-resistive pressure sensor UNIT IV MICRO ACTUATORS 9 Design of Actuators: Actuation using thermal forces, Actuation using shape memory Alloys, Actuation using piezoelectric crystals, Actuation using Electrostatic forces (Parallel plate, Torsion bar, Comb drive actuators), Micromechanical Motors and pumps. Case study: Comb drive actuators UNIT V NANOSYSTEMS AND QUANTUM MECHANICS 9 Atomic Structures and Quantum Mechanics, Molecular and Nanostructure Dynamics: Shrodinger Equation and Wavefunction Theory, Density Functional Theory, Nanostructures and Molecular Dynamics, Electromagnetic Fields and their quantization, Molecular Wires and Molecular Circuits TOTAL: 45PERIODS REFERENCES: 1. Marc Madou, “Fundamentals of Microfabrication”, CRC press 1997. 2. Stephen D. Senturia,” Micro system Design”, Kluwer Academic Publishers,2001 3. Tai Ran Hsu ,”MEMS and Microsystems Design and Manufacture” ,Tata Mcraw Hill, 2002. 4. Chang Liu, “Foundations of MEMS”, Pearson education India limited, 2006, 5. Sergey Edward Lyshevski, “MEMS and NEMS: Systems, Devices, and Structures” CRC Press, 2002 45 DS7301 SPEECH AND AUDIO SIGNAL PROCESSING L T P C 3 0 0 3 OBJECTIVES: • To study the basic concepts of speech and audio. • To study the analysis of various M-band filter banks for audio coding • To learn various transform coders for audio coding. • To study the speech processing methods in time and frequency domain UNIT I MECHANICS OF SPEECH AND AUDIO 9 Introduction - Review Of Signal Processing Theory-Speech production mechanism – Nature of Speech signal – Discrete time modelling of Speech production – Classification of Speech sounds – Phones – Phonemes – Phonetic and Phonemic alphabets – Articulatory features. Absolute Threshold of Hearing - Critical Bands- Simultaneous Masking, Masking-Asymmetry, and the Spread of MaskingNonsimultaneous Masking - Perceptual Entropy - Basic measuring philosophy -Subjective versus objective perceptual testing - The perceptual audio quality measure (PAQM) - Cognitive effects in judging audio quality. UNIT II TIME-FREQUENCY ANALYSIS: FILTER BANKS AND TRANSFORMS 9 Introduction -Analysis-Synthesis Framework for M-band Filter Banks- Filter Banks for Audio Coding: Design Considerations - Quadrature Mirror and Conjugate Quadrature Filters- Tree-Structured QMF and CQF M-band Banks - Cosine Modulated “Pseudo QMF” M-band Banks - Cosine Modulated Perfect Reconstruction (PR) M-band Banksand the Modified Discrete Cosine Transform (MDCT) Discrete Fourier and Discrete Cosine Transform - Pre-echo Distortion- Pre-echo Control Strategies. UNIT III AUDIO CODING AND TRANSFORM CODERS 9 LosslessAudioCoding-LossyAudioCoding- ISO-MPEG-1A,2A,2A Advaned , 4A udioCoding - Optimum Coding in the Frequency Domain - Perceptual Transform Coder -Brandenburg-Johnston Hybrid Coder - CNET Coders - Adaptive Spectral Entropy Coding -Differential Perceptual Audio Coder - DFT Noise Substitution -DCT with Vector Quantization -MDCT with Vector Quantization. UNIT IV TIME AND FREQUENCY DOMAIN METHODS FOR SPEECH PROCESSING 9 Time domain parameters of Speech signal – Methods for extracting the parameters :Energy, Average Magnitude – Zero crossing Rate – Silence Discrimination using ZCRand energy Short Time Fourier analysis – Formant extraction – Pitch Extraction using time and frequency domain methods HOMOMORPHIC SPEECH ANALYSIS: Cepstral analysis of Speech – Formant and Pitch Estimation – Homomorphic Vocoders. UNIT V LINEAR PREDICTIVE ANALYSIS OF SPEECH 9 Formulation of Linear Prediction problem in Time Domain – Basic Principle – Auto correlation method – Covariance method – Solution of LPC equations – Cholesky method – Durbin’s Recursive algorithm – lattice formation and solutions – Comparison of different methods – Application of LPC parameters – Pitch detection using LPC parameters – Formant analysis – VELP – CELP. TOTAL: 45PERIODS REFERENCES: 1. Digital Audio Signal Processing, Second Edition, Udo Zölzer, A John Wiley& sons Ltd Publicatioons 2. Applications of Digital Signal Processing to Audio And Acoustics Mark Kahrs, Karlheinz Brandenburg, KLUWER ACADEMIC PUBLISHERS NEW YORK, BOSTON, DORDRECHT, L ONDON , MOSCOW 3. Digital Processing of Speech signals – L.R.Rabiner and R.W.Schaffer - Prentice Hall –1978 46 AP7016 SYSTEM ON CHIP DESIGN L T P C 3 0 0 3 OBJECTIVES : • To design combinational and sequential logic networks. • To learn optimization of power in combinational and sequential logic machines. • To study the design principles of FPGA and PLA. • To learn various floor planning methods for system design. UNIT I LOGIC GATES 9 Introduction. Combinational Logic Functions. Static Complementary Gates. Switch Logic. Alternative Gate Circuits. Low-Power Gates. Delay Through Resistive Interconnect. Delay Through Inductive Interconnect. UNIT II COMBINATIONAL LOGIC NETWORKS 9 Introduction. Standard Cell-Based Layout. Simulation. Combinational Network Delay. Logic and interconnect Design. Power Optimization. Switch Logic Networks. Combinational Logic Testing. UNIT III SEQUENTIAL MACHINES 9 Introduction. Latches and Flip-Flops. Sequential Systems and Clocking Disciplines. Sequential System Design. Power Optimization. Design Validation. Sequential Testing. UNIT IV SUBSYSTEM DESIGN 9 Introduction. Subsystem Design Principles. Combinational Shifters. Adders. ALUs. Multipliers. HighDensity Memory. FieldProgrammable Gate Arrays. Programmable Logic Arrays. References. Problems. UNIT V FLOOR-PLANNING 9 Introduction, Floor-planning Methods – Block Placement & Channel Definition, Global Routing, switchbox Routing, Power Distribution, Clock Distributions, Floor-planning Tips, Design Validation. Off-Chip Connections – Packages, The I/O Architecture, PAD Design. TOTAL: 45PERIODS REFERENCES: 1. Wayne Wolf, “Modern VLSI Design – System – on – Chip Design”, Prentice Hall, 3rd Edition 2008. 2. Wayne Wolf, “Modern VLSI Design – IP based Design”, Prentice Hall, 4th Edition , 2008. CP7023 RECONFIGURABLE COMPUTING L T P C 3 0 0 3 OBJECTIVES: • To understand the need for reconfigurable computing • To expose the students to various device architectures • To examine the various reconfigurable computing systems • To understand the different types of compute models for programming reconfigurable architectures • To expose the students to HDL programming and familiarize with the development environment • To expose the students to the various placement and routing protocols • To develop applications with FPGAs 47 UNIT I DEVICE ARCHITECTURE 9 General Purpose Computing Vs Reconfigurable Computing – Simple Programmable Logic Devices – Complex Programmable Logic Devices – FPGAs – Device Architecture - Case Studies. UNIT II RECONFIGURABLE COMPUTING ARCHITECTURES AND SYSTEMS 9 Reconfigurable Processing Fabric Architectures – RPF Integration into Traditional Computing Systems – Reconfigurable Computing Systems – Case Studies – Reconfiguration Management. UNIT III PROGRAMMING RECONFIGURABLE SYSTEMS 9 Compute Models - Programming FPGA Applications in HDL – Compiling C for Spatial Computing – Operating System Support for Reconfigurable Computing. UNIT IV MAPPING DESIGNS TO RECONFIGURABLE PLATFORMS 9 The Design Flow - Technology Mapping – FPGA Placement and Routing – Configuration Bitstream Generation – Case Studies with Appropriate Tools. UNIT V APPLICATION DEVELOPMENT WITH FPGAS Case Studies of FPGA Applications – System on a Programmable Chip (SoPC) Designs. 9 TOTAL: 45 PERIODS OUTCOMES: Upon completion of the course, the students will be able to • Identify the need for reconfigurable architectures • Discuss the architecture of FPGAs • Point out the salient features of different reconfigurable architectures • Build basic modules using any HDL • Develop applications using any HDL and appropriate tools • Design and build an SoPC for a particular application REFERENCES: 1. Maya B. Gokhale and Paul S. Graham, “Reconfigurable Computing: Accelerating Computation with Field-Programmable Gate Arrays”, Springer, 2005. 2. Scott Hauck and Andre Dehon (Eds.), “Reconfigurable Computing – The Theory and Practice of FPGA-Based Computation”, Elsevier / Morgan Kaufmann, 2008. 3. Christophe Bobda, “Introduction to Reconfigurable Computing – Architectures, Algorithms and Applications”, Springer, 2010. 48 NC7202 WIRELESS ADHOC AND SENSOR NETWORKS L T P C 3 0 0 3 UNIT I ADHOC NETWORKS AND ROUTING PROTOCOLS 9 Ad hoc Wireless Networks – What is an Ad Hoc Network? Heterogeneity in Mobile Devices – Wireless Sensor Networks – Traffic Profiles – Types of Ad hoc Mobile Communications – Types of Mobile Host Movements – Challenges Facing Ad hoc Mobile Networks – Ad hoc wireless Internet . Issues in Designing a Routing Protocol for Ad Hoc Wireless Networks – Classifications of Routing Protocols – Table–Driven Routing Protocols – Destination Sequenced Distance Vector (DSDV) – Wireless Routing Protocol (WRP) – Cluster Switch Gateway Routing (CSGR) – Source–Initiated On– Demand Approaches – Ad hoc On–Demand Distance Vector Routing (AODV) – Dynamic Source Routing (DSR) –Temporally Ordered Routing Algorithm (TORA) – Signal Stability Routing (SSR) – Location–Aided Routing (LAR) – Power–Aware Routing (PAR) – Zone Routing Protocol (ZRP). UNIT II MULTICAST ROUTING AND SECURITY 9 Issues in Designing a Multicast Routing Protocol – Operation of Multicast Routing Protocols – An Architecture Reference Model for Multicast Routing Protocols –Classifications of Multicast Routing Protocols – Tree–Based Multicast Routing Protocols– Mesh–Based Multicast Routing Protocols – Summary of Tree and Mesh based Protocols – Energy–Efficient Multicasting – Multicasting with Quality of Service Guarantees – Application – Dependent Multicast Routing – Comparisons of Multicast Routing Protocols - Design Goals of a Transport Layer Protocol for Ad hoc Wireless Networks –Classification of Transport Layer Solutions – TCP over Ad hoc Wireless Networks- Security in Ad Hoc Wireless Networks – Network Security Requirements – Issues and Challenges in Security Provisioning – Network Security Attacks – Key Management – Secure Routing in Ad hoc Wireless Networks. UNIT III QoS AND ENERGY MANAGEMENT 9 Issues and Challenges in Providing QoS in Ad hoc Wireless Networks – Classifications of QoS Solutions – MAC Layer Solutions – Network Layer Solutions – QoS Frameworks for Ad hoc Wireless Networks Energy Management in Ad hoc Wireless Networks – Introduction – Need for Energy Management in Ad hoc Wireless Networks – Classification of Energy Management Schemes – Battery Management Schemes – Transmission Power Management Schemes – System Power Management Schemes. UNIT IV SENSOR NETWORKS – ARCHITECTUREAND MACPROTOCOLS 9 Single node architecture – Hardware components, energy consumption of sensor nodes, Network architecture – Sensor network scenarios, types of sources and sinks, single hop versus multi-hop networks, multiple sinks and sources, design principles, Development of wireless sensor networks. , physical layer and transceiver design consideration in wireless sensor networks, Energy usage profile, choice of modulation, Power Management - MAC protocols – fundamentals of wireless MAC protocols, low duty cycle protocols and wakeup concepts, contention-based protocols, Schedulebased protocols - SMAC, BMAC, Traffic-adaptive medium access protocol (TRAMA), Link Layer protocols – fundamentals task and requirements, error control, framing, link management. UNIT V SENSOR NETWORKS – ROUTING PROTOCOLS AND OPERATING SYSTEMS 9 Gossiping and agent-based uni-cast forwarding, Energy-efficient unicast, Broadcast and multicast, geographic routing, mobile nodes, Data-centric routing – SPIN, Directed Diffusion, Energy aware routing, Gradient-based routing – COUGAR, ACQUIRE, Hierarchical Routing – LEACH, PEGASIS, Location Based Routing – GAF, GEAR, Data aggregation – Various aggregation techniques. Introduction to TinyOS – NesC, Interfaces, modules, configuration, Programming in TinyOS using NesC, Emulator TOSSIM. TOTAL: 45 PERIODS 49 REFERENCES: 1. C. Siva Ram Murthy and B. S. Manoj, “Ad Hoc Wireless Networks Architectures and Protocols”, Prentice Hall, PTR, 2004. 2. C. K. Toh, “Ad Hoc Mobile Wireless Networks Protocols and Systems”, Prentice Hall, PTR, 2001. 3. Charles E. Perkins, “Ad Hoc Networking”, Addison Wesley, 2000. 4. Kazem Sohraby, Daniel Minoli and Taieb Znati, “ Wireless Sensor Networks TechnologyProtocols and Applications”, John Wiley & Sons, 2007. 5. Feng Zhao, Leonidas Guibas, “Wireless Sensor Networks: an information processing approach”, Else vier publication, 2004. 6. C.S.Raghavendra Krishna, M.Sivalingam and Tarib znati, “Wireless Sensor Networks”, Springer publication, 2004. 7. Holger Karl , Andreas willig, “Protocol and Architecture for Wireless Sensor Networks”, John wiley publication, Jan 2006. 8. K.Akkaya and M.Younis, “ A Survey of routing protocols in wireless sensor networks”, Elsevier Adhoc Network Journal, Vol.3, no.3,pp. 325-349, 2005. 9. Philip Levis, “ TinyOS Programming”, 2006 – www.tinyos.net. 10. I.F. Akyildiz, W. Su, Sankarasubramaniam, E. Cayirci, “Wireless sensor networks: a survey”, computer networks, Elsevier, 2002, 394 - 422. 11. Jamal N. Al-karaki, Ahmed E. Kamal, “Routing Techniques in Wireless sensor networks: A survey”, IEEE wireless communication, December 2004, 6 – 28. 50