Paper of krit

The Advantage of Using Audio Amplifiers Class-D for The New Generations of Mobile Systems Salah-ddine Krit, Member of EAI, Hanane Darhour Abstract –This paper presents the advantages of using Audio amplifiers-class-D which has an important role in every mobile system involving an audible sound. General power amplifiers till recently have been very inefficient, bulky and unreliable. Though Class AB amplifiers have major market share in the audio industry because of their efficiency compared to previous classes of amplifiers such as Class A and Class B, recent demand for smaller devices with longer battery life has resulted in replacement of class AB amplifiers (linear amplifiers) with Class D (switching amplifiers). Class D amplifiers provide the balance between efficiency and distortion required by portable devices, hi-fi audio systems, as they utilize the switching operation where the transistors are either fully on or fully off resulting in amplification with zero power dissipation ideally. The main focus of this thesis is to analyze various design issues involved in the implementation of class D amplifiers. As many designers in the future will be switching to Class D amplifiers because of the recent advances in switching amplifiers, an effort was made to develop the thesis so as to be able to serve as a basic reference guide which gives them a good understanding of existing architectures, challenges in efficient power amplifier design, modulation methods, power stage topologies and implementation of class D amplifiers. A detailed study of parameters and parasitic that affect the performance of class D amplifiers has been carried out with design, implementation, and simulation of various stages. Various component selection decisions and layout issues have been discussed for an efficient, low distortion class D amplifier. Index Terms – Audio amplifiers, efficiency, Class D, distortion, modulation Manuscript received Fivrier 19, 2012; revised March 08, 2012. This work was supported in part by the University of Ibn Zohr Department of Informatics and signal systems Polydisciplinary Faculty of Ouarzazate. S. Krit Author is with the University Ibn Zohr, Polydisciplinary Faculty of Ouarzazate Morocco (corresponding author phone: 212-662-68-53-24; fax: 212-524 -88- 58- 01; (e-mail: s.krit@uiz.ac.ma). H. Darhour Author is with the University Ibn Zohr, Polydisciplinary Faculty of Ouarzazate Morocco. (e-mail: h.darhour@uiz.ac.ma). I. INTRODUCTION A Class A amplifier, the output devices are continuously conducting for the entire cycle, or in other words there is always bias current flowing in the output devices Fig.1. This topology has the least distortion and is the most linear [2], but at the same time is the least efficient at about 20%. The design is typically not complementary with high and low side output devices. Fig.1. Amplifier Class A Class B – This type of amplifier operates in the opposite way to Class A amplifiers. The output devices only conduct for half the sinusoidal cycle (one conducts in the positive region, and one conducts in the negative region), or in other words, if there is no input signal then there is no current flow in the output devices. This class of amplifier is obviously more efficient than Class A, at about 50%, but has some issue with linearity at the crossover point, due to the time it takes to turn one device off and turn the other device on. Fig.4. Block Diagram of a class D Amplifier. Fig.2. Amplifier Class B Class AB – This type of amplifier is a combination of the above two types, and is currently one of the most common types of power amplifier in existence Fig.3. Here both devices are allowed to conduct at the same time, but just a small amount near the crossover point. Hence each device is conducting for more than half a cycle but less than the whole cycle, so the inherent non-linearity of Class B designs is overcome, without the inefficiencies of a Class A design. The efficiencies for Class AB amplifiers is about 50%. Fig.4 above shows the basic block diagram for a Half Bridge Class D amplifier, with the waveforms at each stage. This circuit uses feedback from the output of the half-bridge to help compensate for variations in the bus voltages. So how does a Class D amplifier work? A Class D amplifier works in very much the same way as a PWM power supply (we will show the analogy later). Let’s start with an assumption that the input signal is a standard audio line level signal. This audio line level signal is sinusoidal with a frequency ranging from 20 Hz to 20 kHz typically. This signal is compared with a high frequency triangle or saw tooth waveform to create the PWM signal as seen in fig 5 below. This PWM signal is then used to drive the power stage, creating the amplified digital signal, and finally a low pass filter is applied to the signal to filter out the PWM carrier frequency and retrieve the sinusoidal audio signal (also seen in fig 4). Fig.3.Amplifier Class AB Class D – This class of amplifier is a switching or PWM (Pulse wide Modulation) amplifier as mentioned above[3], [4], [5]. This class of amplifier is the main focus of this application note. In this type of amplifier, the switches are either fully on or fully off, significantly reducing the power losses in the output devices [8]. Efficiencies of 90-95% are possible. The audio signal is used to modulate a PWM carrier signal, which drives the output devices, with the last stage being a low pass filter to remove the high frequency PWM carrier frequency. Class D amplifiers take on many different forms, some can have digital inputs and some can have analog inputs. Here, we will focus on the type which has analog inputs. Fig.5. Class D Amplifier Waveforms II. DESIGN CHALLENGES A. Top view The top schematic view of Class-D amplifier Fig. 6 is composed by a main part (inverting input integrator, triangle generator, PWM modulator, gate driver and MOSFET Hbridge) and secondary parts like common mode voltage and bias current generator, startup and protection circuit, input gain selector and shifter. Two analog power supplies (tailed together with decoupling capacitor on the circuit board) are used with an ESD (Electro Static Dielectric) protection and bonding and are not shown is this schematic but have been taken into account for simulation. have internal filtering, they still have input amplifiers that cannot respond to the fast rising edges of the PWM signal. The purpose of the RC filter is to remove the 250-kHz switching component from the PWM output of a Class-D amplifier. B. Total Harmonic Distortion Plus Noise (THD+N) The typical THD+N measurement combines the effects of noise, distortion, and other undesired signals into one measurement and relates it (usually as a percentage) to the fundamental frequency. Ideally, only the fundamental test frequency of the sine-wave input is present at the output of the APA, which in practice is never the case. The THD+N measurement requires notching out the fundamental test frequency and measuring the RMS voltage (which includes unwanted harmonics and noise) across the audio band (which the AP does automatically) and then dividing that measured value by the fundamental test frequency value and expressing it as a percentage. Fig.6. Class D schematic III. SIMULATION RESULTS AND COMPARISON The class D audio amplifier has been integrated in a 0.25um, double-poly, triple-metal, BiCMOS process, occupying an area of 1.5 x 1.2 mm2 fig.9 show the Layout of the proposed Amplifier Class D. The measured output peak current was measured to be 0.35A into an 8 ohm load, using a 3.6V supply voltage. The IC consumed 2.5mA of quiescent current under those conditions with an output power of 0.5W and a power efficiency of 79%. A power efficiency of 90%, Fig.8 shows that the comparison output efficiency between class-D and class-AB was achieved at a supply voltage of 6.5V. Fig. 10 shows the efficiency versus power curve. The total harmonic distortion plus noise (THD+N) was measured with an Audio Precision (AP) measurement system [6], [7], [8]. A low pass filter had to be used at the output since the AP measurement system cannot handle pure class D audio amplifiers because of the high frequency PWM waveform. The THD+N measured under the above-mentioned conditions vary from under 0.04% at low frequencies to a maximum of 0.4% at 7 kHz. Fig. 7 shows a plot of the THD+N versus the power under different supply voltage levels [9], [10], [10], [12]. Fig 9 shows layout of Amplifier Class D with process 0.18 um. Table 1 summarizes the measured results. The output offset is higher than predicted in the simulations because of mismatch in the feedback and in the input resistors. A. Why use a low-pass RC output filter with Class-D amplifiers? Class-D audio power amplifier (APA) families use a modulation scheme that does not always require an output filter for operation, but they do require some sort of lowpass filtering when making an output power measurement or a THD+N measurement. This is because the 250-kHz switching signal is seen as a common-mode voltage across the inputs of the audio measurement instrument. Typically, audio analyzing equipment has low common-mode rejection at 250 kHz, because the equipment is designed to work in the audio band. Although most audio analyzing instruments C. Output Power Audio power amplifier design typically uses speakers with impedances from 3 Ω to 32 Ω. When calculating the power, the output voltage (Vout) is specified as an RMS value and the following equationis used: (1) Where, PO = Output power RL = Load impedance And, (2) Where, VO(P) = Peak voltage VO(PP) = Peak-to-peak voltage It is important to understand the relationships among peak output voltage (VO(P)), peak-to-peak output voltage (VO(PP)), and the RMS output voltage (VO(RMS)) because these specific values are used when calculating the output power delivered to the load. Fig. 7. Shows the THD+N versus the power. Fig.8. Efficiency of Class-D and Class-AB versus output power Fig.9. Layout of the proposed Amplifier Class D. TABLE1 : COPARISON BETWEEN CLASS AB AND CLASS D. Effeciency Power Consuption Distorsio Area Class-AB 50 500mA 0,5 2,5 mm2 Class-D 90 200 mA 0,1 1,5mm2 IV. CONCLUSIONS We have presented a new class D audio amplifier for low voltage applications with high efficiency and minimum system solution size. The amplifier is a great improvement over its class AB counterparts where it comes to battery powered application since it dissipates less power in the amplifier itself. REFERENCES [1] [2] Score, Michael, and Donald Dapkus. “Audio Power Amplifier Solutions for New Wireless Phones,” Wireless Symposium, February 2000. Van der Zee, Ronan A. R., and Ed van Tuijl “A Power-Efficient Audio Amplifier Combining Switching and Linear Techniques,” IEEE Journal of Solid-State Circuits, vol. 34, pp. 985-987, July 1999. [3] Choi, Soo-chang, Jun-woo Lee, Woo-kang Jin, Jae-hwan So, and Suki Kim, “A Design of a 10- W Single Chip Class D Audio Amplifier with Very High Efficiency using CMOS Technology,” IEEE Transactions on Consumer Electronics, vol. 45, pp. 465 – 473, August 1999. [4] Jeong, Jay H., Hawn H. Seong, Jeong H. Yi, Gyu H. Cho, “A class D switching power amplifier with high efficiency and wide bandwidth by dual feedback loops,” Proc. of International Conference on consumer Electronics, 1995, pp. 428 –429. [5] Score, Michael. “Optimized Modulation Scheme Eliminates Output Filter,” AES Preprint #5196, 109th Convention, pp. 22-25, September 2000. [6] Chen, Wayne T. and R. Clif Jones, “Concepts and Design of Filterless Class-D Audio Amplifiers,” Texas Instruments Technical Journal, vol. 18, No. 2, April 2001. [7] Leigh, S. P, P. H. Mellor, and B. M. G. Cheetham, “Distortion Analysis and Reduction in a Completely [8] Krit Salahddine and Hassan Qjidaa “Audio Power Amplifier Solutions for New Wireless Phones” IJCSNS International Journal of Computer Science and Network Security, VOL.9 No.1, January 2009 [9] Krit Salahddine and Hassan Qjidaa “Ultra-low quiescent regulator Including precise reference and the Power-On-Reset circuit” Conference IEEE Sciences Electroniques, Technologies de l'Information et des Telecommunications (SETIT 05) Tunisia. [10] Krit Salahddine and Hassan Qjidaa “Standard CMOS Low drop-out regulator with new dynamic Compensation” International Conf. on Modeling and Simulation, ICMS-2005 Marrakech. [11] Krit Salahddine, Hassan Qjidaa “A novel CMOS charge-pump circuit with current mode control 110 mA at 2.7 V for telecommunication systems” JOS Journal of Semiconductors, VOL. 31 No. 4, April 2010 [12] Krit Salah-ddine , Zared Kamal, Qjidaa Hassan and Zouak Mohcine, “A 100 mA Low Voltage Linear Regulators for Systems on Chip Applications Using 0.18 µm CMOS Technology” IJCSI International Journal of Computer Science Issues, Vol. 9, Issue 1, No 3, January 2012.