article

FPGA-based Personal Authentication Using Fingerprints

Authors:

Francisco Fons,

Enrique Cantó,

Mariano LópezAuthors Info & Claims

Journal of Signal Processing Systems, Volume 66, Issue 2

Pages 153 - 189

https://doi.org/10.1007/s11265-011-0629-3

Published: 01 February 2012 Publication History

Abstract

The current technological age demands the deployment of biometric security systems not only in those stringent and highly reliable fields (forensic, government, banking, etc.) but also in a wide range of daily use consumer applications (internet access, border control, health monitoring, mobile phones, laptops, etc.) accessible worldwide to any user. In order to succeed in the exploitation of biometric applications over the world, it is needed to make research on power-efficient and cost-effective computational platforms able to deal with those demanding image and signal operations carried out in the biometric processing. The present work deals with the evaluation of alternative system architectures to those existing PC (personal computers), HPC (high-performance computing) or GPU-based (graphics processing unit) platforms in one specific scenario: the physical implementation of an AFAS (automatic fingerprint-based authentication system) application. The development of automated fingerprint-based personal recognition systems in the way of compute-intensive and real-time embedded systems under SoPC (system-on-programmable-chip) devices featuring one general-purpose MPU (microprocessor unit) and one run-time reconfigurable FPGA (field programmable gate array) proves to be an efficient and cost-effective solution. The provided flexibility, not only in terms of software but also in terms of hardware thanks to the programmability and run-time reconfigurability performance exhibited by the suggested FPGA device, permits to build any application by means of hardware-software co-design techniques. The parallelism and acceleration performances inherent to the hardware design and the ability of reusing hardware resources along the application execution time are key factors to improve the performance of existing systems.

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Cited By

Ghamkhari SGhaznavi-Ghoushchi M(2021)A New Low Power Schema for Stream Processors Front-End with Power-Aware DA-Based FIR Filters by Investigation of Image Transitions SparsityCircuits, Systems, and Signal Processing10.1007/s00034-020-01632-240:7(3456-3478)Online publication date: 1-Jul-2021
https://dl.acm.org/doi/10.1007/s00034-020-01632-2
Cant-Navarro ELpez-Garca MRamos-Lara R(2018)Floating-point accelerator for biometric recognition on FPGA embedded systemsJournal of Parallel and Distributed Computing10.1016/j.jpdc.2017.09.010112:P1(20-34)Online publication date: 1-Feb-2018
https://dl.acm.org/doi/10.1016/j.jpdc.2017.09.010
Bhairannawar SSarkar SRaja KVenugopal K(2018)Implementation of Fingerprint Based Biometric System Using Optimized 5/3 DWT Architecture and Modified CORDIC Based FFTCircuits, Systems, and Signal Processing10.1007/s00034-017-0555-037:1(342-366)Online publication date: 1-Jan-2018
https://dl.acm.org/doi/10.1007/s00034-017-0555-0
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Information

Published In

cover image Journal of Signal Processing Systems

Journal of Signal Processing Systems Volume 66, Issue 2

February 2012

130 pages

ISSN:1939-8018

EISSN:1939-8115

Issue’s Table of Contents

Copyright © Copyright © 2012 Springer Science+Business Media, LLC.

Publisher

Kluwer Academic Publishers

United States

Publication History

Published: 01 February 2012

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Cited By

Ghamkhari SGhaznavi-Ghoushchi M(2021)A New Low Power Schema for Stream Processors Front-End with Power-Aware DA-Based FIR Filters by Investigation of Image Transitions SparsityCircuits, Systems, and Signal Processing10.1007/s00034-020-01632-240:7(3456-3478)Online publication date: 1-Jul-2021
https://dl.acm.org/doi/10.1007/s00034-020-01632-2
Cant-Navarro ELpez-Garca MRamos-Lara R(2018)Floating-point accelerator for biometric recognition on FPGA embedded systemsJournal of Parallel and Distributed Computing10.1016/j.jpdc.2017.09.010112:P1(20-34)Online publication date: 1-Feb-2018
https://dl.acm.org/doi/10.1016/j.jpdc.2017.09.010
Bhairannawar SSarkar SRaja KVenugopal K(2018)Implementation of Fingerprint Based Biometric System Using Optimized 5/3 DWT Architecture and Modified CORDIC Based FFTCircuits, Systems, and Signal Processing10.1007/s00034-017-0555-037:1(342-366)Online publication date: 1-Jan-2018
https://dl.acm.org/doi/10.1007/s00034-017-0555-0
Khan TBailey DKhan MKong Y(2017)Efficient Hardware Implementation For Fingerprint Image Enhancement Using Anisotropic Gaussian FilterIEEE Transactions on Image Processing10.1109/TIP.2017.267178126:5(2116-2126)Online publication date: 1-May-2017
https://dl.acm.org/doi/10.1109/TIP.2017.2671781
Bhairannawar SRaja KVenugopal K(2016)An Efficient Reconfigurable Architecture for Fingerprint RecognitionVLSI Design10.1155/2016/95327622016(1)Online publication date: 1-Jul-2016
https://dl.acm.org/doi/10.1155/2016/9532762
Lastra MCarabaño JGutiérrez PBenítez JHerrera F(2015)Fast fingerprint identification using GPUsInformation Sciences: an International Journal10.1016/j.ins.2014.12.052301:C(195-214)Online publication date: 20-Apr-2015
https://dl.acm.org/doi/10.1016/j.ins.2014.12.052

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