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    Early Microcomputer Design

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    Rey Dumpit
    The SAP1 is an early 8-bit microcomputer architecture with 16x8 memory locations addressed by 4 lines. It can perform addition and subtraction but no logical operations. The SAP1 uses a single 8-bit W-Bus for address and data transfer. It explains how a microprocessor works by fetching and executing instructions and interacting with memory and I/O. The key components are a program counter, input/address registers, RAM, instruction register, controller, accumulator, adder/subtractor, B-register, output register, and binary display. The SAP1 has six timing states - three each for fetch and execute cycles, with unused states as NOP cycles.

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    Early Microcomputer Design

    Uploaded by

    Rey Dumpit
    19 views1 page
    The SAP1 is an early 8-bit microcomputer architecture with 16x8 memory locations addressed by 4 lines. It can perform addition and subtraction but no logical operations. The SAP1 uses a single 8-bit W-Bus for address and data transfer. It explains how a microprocessor works by fetching and executing instructions and interacting with memory and I/O. The key components are a program counter, input/address registers, RAM, instruction register, controller, accumulator, adder/subtractor, B-register, output register, and binary display. The SAP1 has six timing states - three each for fetch and execute cycles, with unused states as NOP cycles.

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    The SAP1 is an early 8-bit microcomputer architecture with 16x8 memory locations addressed by 4 lines. It can perform addition and subtraction but no logical operations. The SAP1 uses a single 8-bit W-Bus for address and data transfer. It explains how a microprocessor works by fetching and executing instructions and interacting with memory and I/O. The key components are a program counter, input/address registers, RAM, instruction register, controller, accumulator, adder/subtractor, B-register, output register, and binary display. The SAP1 has six timing states - three each for fetch and execute cycles, with unused states as NOP cycles.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as DOCX, PDF, TXT or read online from Scribd
    Download as docx, pdf, or txt
    19 views1 page

    Early Microcomputer Design

    Uploaded by

    Rey Dumpit
    The SAP1 is an early 8-bit microcomputer architecture with 16x8 memory locations addressed by 4 lines. It can perform addition and subtraction but no logical operations. The SAP1 uses a single 8-bit W-Bus for address and data transfer. It explains how a microprocessor works by fetching and executing instructions and interacting with memory and I/O. The key components are a program counter, input/address registers, RAM, instruction register, controller, accumulator, adder/subtractor, B-register, output register, and binary display. The SAP1 has six timing states - three each for fetch and execute cycles, with unused states as NOP cycles.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as DOCX, PDF, TXT or read online from Scribd
    Download as docx, pdf, or txt
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    Early Microcomputer Design

    SAP1 (Simple-As-Possible) Architecture The SAP1 architecture is 8 bits and comprises of 16x8 memory, that is memory location with 8 bits in each location,therefore, need 4 address lines which either comes from the Program Counter during computer run phase or comes from the four address switches during the program phase. SAP can only perform addition and subtraction and no logical operation. SAP1 has a W-Bus, a single 8 bit bus for address and data transfer. SAP1 explains how a microprocessor works, how instructions are being process and executed and how it interacts with memory and input and output. SAP1 Architecture 1. Program Counter (PC) - It sends the address of the next instruction to the memory that will be fetched and executed. 2. Input and MAR - include the address and switch registers. The switch registers allows to send an address bits to the RAM. 3. RAM - allows you to store data in memory before a computer/program runs. 4. Instruction Registers (IR) - part of the control unit that contains the instruction to be executed. 5. Controller Sequencer - control the operation of the computer. 6. Accumulator - is a buffer register that store intermediate result of computer operation. 7. Adder/Subtracter - is a 2's complement adder/subtracter. 8. B-Register - a buffer register used in arithmetic operation. 9. Output Register - contain the result of operation. 10. Binary Display - row of 8 bit LED, that shows the output. SAP1 has six T-states(Timing states), three fetch and three execute cycles, for each instruction. T1, T2, T3 cycle are use for fetch cycle and T4, T5, T6 cycle are use for execute cycles. And those unused T-states will be considered as NOP(no operation) cycle.

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