Location via proxy:   [ UP ]  
[Report a bug]   [Manage cookies]                
Scribd
Upload
4K views

Instruction Templates of Microprocessor 8086

The document discusses instruction templates for the 8086 microprocessor. It explains that the 8086 has around 13,000 opcodes compared to the 8085's 246 opcodes. It then describes the template used to encode 8086 instructions that transfer data between registers and memory locations. The template includes fields to specify the destination, source, data size, addressing mode, and register or memory address. Several examples are provided to demonstrate how to use the template to encode instructions like MOV, with 2 possible encodings for instructions that can specify either register as the source or destination.

Uploaded by

Tafzeel Mohammad
Copyright
© Attribution Non-Commercial (BY-NC)
Available Formats
Download as PDF, TXT or read online on Scribd
4K views

Instruction Templates of Microprocessor 8086

The document discusses instruction templates for the 8086 microprocessor. It explains that the 8086 has around 13,000 opcodes compared to the 8085's 246 opcodes. It then describes the template used to encode 8086 instructions that transfer data between registers and memory locations. The template includes fields to specify the destination, source, data size, addressing mode, and register or memory address. Several examples are provided to demonstrate how to use the template to encode instructions like MOV, with 2 possible encodings for instructions that can specify either register as the source or destination.

Uploaded by

Tafzeel Mohammad
Copyright
© Attribution Non-Commercial (BY-NC)
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 5

8086 Instruction Template Need for Instruction Template 8085 has 246 opcodes.

The opcodes can be printed on an A4 size paper. 8086 has about 13000 opcodes. A book of about 60 pages is needed for printing the opcodes. Concept of Template In 8085, MOV r1, r2 (ex. MOV A, B) has the following template. 0 1 3-bit r1 code Register B C D E H L M A MOV A, 01 11 1 7 B is 000 = 78H 8 3-bit r2 code

3-bit Register code 000 001 010 011 100 101 110 111 Ex. 1: Code for

Ex.2: Code for

MOV M, D is 01 11 0 010 = 72H 7 2

Using the template for MOV r1, r2 we can generate opcodes of 26 = 64 opcodes. 8086 Template for data transfer between REG and R/M 1 0 0 0 1 0 D W MOD 2 bits REG 3 bits R/M 3 bits

REG = A register of 8086 (8-bit or 16-bits) (except Segment registers, IP, and Flags registers) Thus REG = AL/ BL/ CL/ DL/ AH/ BH/ CH/ DH/ AX/ BX/ CX/ DX/ SI/ DI/ BP/ SP R/ M = Register (as defined above) or Memory contents (8-bits or 16-bits) W = 1 means Word operation W = 0 means Byte operation

D = 1 means REG is Destination register D = 0 means REG is source register MOD = 00 means R/M specifies Memory with no displacement MOD = 01 means R/M specifies Memory with 8-bit displacement MOD = 10 means R/M specifies Memory with 16-bit displacement MOD = 11 means R/M specifies a Register 3-bit Register code 000 001 010 011 100 101 110 111 Register name When W = 1 When W = 0 AX AL CX CL DX DL BX BL SP AH BP CH SI DH DI BH ALl Children Drink Bournvita (AL, CL, DL, BL) SPecial Beverages SIamese DrInk (SP, BP, SI, DI)

Aid to remember:

Case of MOD = 11 Example: Code for MOV AX, BX treated as Move from BX to destination register AX D 1 W 1 Word operation B MOD 11 REG 00 0 AX is destination C R/M 011 BX 3

1 0 0 0

= 8B C3H

Example: Alternative code for MOV AX, BX treating it as Move from source register BX to register AX D 0 0 W 1 Word operation 9 MOD 11 REG 01 1 BX is source 8 R/M 000 AX

1 0 0 0

= 89 D8H

There are 2 possible opcodes for MOV AX, BX as we can choose either AX or BX as REG.

Example: Code for MOV AL, BH treated as Move from BL to destination register AL D 0 1 W 0 Byte operation A MOD 11 REG 00 0 AL is destination C R/M 111 BH 7

1 0 0 0

= 8A C7H

Example: Alternative code for MOV AL, BH treating it as Move from source register BH to register AL D 0 0 W 0 Byte operation 8 MOD 11 REG 11 1 BH is source R/M 000 AL 8

1 0 0 0

= 88 F8H

There are 2 possible opcodes for MOV AL, BH as we can choose either AL or BH as REG. Case of MOD = 00, 01 or 10 R/M MOD = 00 No Displacement [SI+BX] [DI+BX] [SI+BP] [DI+BP] [SI] [DI] [BP] Direct Addressing [BX] MOD = 01 8-bit signed displacement d8 [SI+BX+d8] [DI+BX+d8] [SI+BP+d8] [DI+BP+d8] [SI+d8] [DI+d8] [BP+d8] [BX+d8] MOD = 10 16-bit signed displacement d16 [SI+BX+d16] [DI+BX+d16] [SI+BP+d16] [DI+BP+d16] [SI+d16] [DI+d16] [BP+d16] [BX+d16]

000 001 010 011 100 101 110 111

The table shows 24 memory addressing modes i.e. 24 different ways of accessing data stored in memory. Aid to remember: SubInspector DIxit is a BoXer ( [SI+BX] and [DI]+[BX] ) SubInspector DIxit knows to control BP ( [SI+BP] and [DI]+[BP] ) He says SImple DIet DIRECTs a BoXer' ( [SI], [DI], Direct addressing, [BX] )

Ex: Code for MOV CL, [SI] D 1 W 0 Byte operation A MOD REG R/M 00 00 1 100 No CL is [SI] Disp. destination 0 C

1 0 0 0

= 8A 0CH

Note that there is a unique opcode for MOV CL, [SI] as CL only can be REG. Ex: Code for MOV 46H[BP], DX D 1 0 0 0 1 0 0 W 1 Word operation 9 MOD REG R/M d8 01 01 0 110 46H 8-bit DX is [BP+d8] Disp. source 5 6

= 89 56 46H

Note that there is a unique opcode for MOV 46H[BP], DX as DX only can be REG. Ex: Code for MOV 0F246H[BP], DX D 0 0 W 1 Word operation 9 MOD 10 16-bit Disp. 9 REG 01 0 DX is source R/M 110 [BP+d16] 6 d16 F2 46H

= 89 96 F2 46H Stored as 89 96 46 F2H in Little Endian

Note that there is a unique opcode for MOV 0F246H[BP], DX as DX only can be REG.

Ex: Code for MOV [BP], DX D 0 W 1 Word operation 9 MOD REG R/M d8 01 01 0 110 00H 8-bit DX is [BP+d8] Disp. source 5 6

1 0 0 0 1 0

= 89 56 00H

Note that MOV [BP], DX is treated as MOV 00H[BP], DX before coding.

Ex: Code for MOV BX, DS:1234H D 1 0 0 0 1 0 1 W 1 Word operation 8 B MOD 00 REG 01 1 R/M 110 Direct addr. E Direct addr 12 34H

= 8B 1E 12 34H Stored as 8B 1E 34 12H In Little Endian

No BX is Disp. Dest. 1

Note that when MOD = 00 and R/M = 110, it represents Direct Addressing.

You might also like